Table of Contents - rggen-verilog-0.3.2 Documentation
Classes and Modules
- Object
- RgGen
- RgGen::Verilog
- RgGen::Verilog::ComponentFactory
- RgGen::Verilog::Feature
- RgGen::Verilog::FeatureFactory
- RgGen::Verilog::Utility
- RgGen::Verilog::Utility::LocalScope
Methods
- #address_width — Object
- #array_size — Object
- #bit_field_read_data — Object
- #bit_field_read_mask — Object
- #bit_field_valid — Object
- #bit_field_value — Object
- #bit_field_write_data — Object
- #bit_field_write_mask — Object
- #body_code — Object
- #bus_width — Object
- #byte_size — Object
- #clear_signal — Object
- #clock — Object
- #clock_or_reset? — Object
- #control_signal — Object
- #control_signal_polarity — Object
- #create_parameter — RgGen::Verilog::Feature
- #create_port — RgGen::Verilog::Feature
- #create_variable — RgGen::Verilog::Feature
- #define_accessor_for_initial_value — Object
- #enable_or_lock — Object
- #end_address — Object
- #fill_0 — RgGen::Verilog::Utility
- #fill_1 — RgGen::Verilog::Utility
- #full_name — Object
- #generate_for — RgGen::Verilog::Utility::LocalScope
- #id_width_value — Object
- #initial_value — Object
- #initial_value_array_size — Object
- #initial_value_name — Object
- #initial_value_rhs — Object
- #local_address_width — Object
- #local_scope — RgGen::Verilog::Utility
- #loop_size — Object
- #loop_variables — Object
- #lsb — Object
- #macro_definition — Object
- #mask — Object
- #merged_initial_values — Object
- #parameterized_initial_value? — Object
- #parameters — Object
- #ports — Object
- #read_action — Object
- #read_set? — Object
- #reference_bit_field — Object
- #reference_or_value_in — Object
- #register_access — Object
- #register_active — Object
- #register_address — Object
- #register_read_data — Object
- #register_ready — Object
- #register_status — Object
- #register_strobe — Object
- #register_valid — Object
- #register_value — Object
- #register_write_data — Object
- #reset — Object
- #set_signal — Object
- #sized_initial_value — Object
- #sort_port_declarations — Object
- #start_address — Object
- #target_feature_key — Object
- #top_scope? — Object
- #total_registers — Object
- #trigger_value — Object
- #valid_type? — Object
- #value — Object
- #value_out_unmasked — Object
- #value_width — Object
- #variables — Object
- #verilog_module_body — Object
- #verilog_module_definition — Object
- #width — Object
- #write_action — Object
- #write_enable — Object
- #write_once — Object