module RgGen::SystemVerilog::RTL::RegisterIndex

Constants

EXPORTED_METHODS

Public Class Methods

included(feature) click to toggle source
# File lib/rggen/systemverilog/rtl/register_index.rb, line 15
def self.included(feature)
  feature.module_eval do
    EXPORTED_METHODS.each { |m| export m }

    pre_build do
      @base_index = files_and_registers.sum(&:count)
    end
  end
end

Public Instance Methods

index(offset_or_offsets = nil) click to toggle source
# File lib/rggen/systemverilog/rtl/register_index.rb, line 52
def index(offset_or_offsets = nil)
  offset_or_offsets
    .yield_self(&method(:index_operands))
    .yield_self(&method(:partial_sums))
    .yield_self(&method(:reduce_indices))
end
inside_loop?() click to toggle source
# File lib/rggen/systemverilog/rtl/register_index.rb, line 59
def inside_loop?
  component.array? || upper_register_file&.inside_loop? || false
end
local_index() click to toggle source
# File lib/rggen/systemverilog/rtl/register_index.rb, line 40
def local_index
  (component.array? || nil) &&
    local_index_coefficients
      .zip(local_loop_variables)
      .map { |operands| product(operands, false) }
      .join('+')
end
local_indices() click to toggle source
# File lib/rggen/systemverilog/rtl/register_index.rb, line 48
def local_indices
  [*upper_register_file&.local_indices, local_index]
end
local_loop_variables() click to toggle source
# File lib/rggen/systemverilog/rtl/register_index.rb, line 30
def local_loop_variables
  (component.array? || nil) &&
    begin
      start_depth = (upper_register_file&.loop_variables&.size || 0) + 1
      Array.new(component.array_size.size) do |i|
        create_identifier(loop_index(i + start_depth))
      end
    end
end
loop_variables() click to toggle source
# File lib/rggen/systemverilog/rtl/register_index.rb, line 25
def loop_variables
  (inside_loop? || nil) &&
    [*upper_register_file&.loop_variables, *local_loop_variables]
end

Private Instance Methods

index_operands(offset_or_offsets) click to toggle source
# File lib/rggen/systemverilog/rtl/register_index.rb, line 78
def index_operands(offset_or_offsets)
  offsets = offset_or_offsets && Array(offset_or_offsets)
  [
    *upper_register_file&.index(offsets&.slice(0..-2)),
    @base_index,
    *local_register_index(offsets&.slice(-1))
  ]
end
local_index_coefficients() click to toggle source
# File lib/rggen/systemverilog/rtl/register_index.rb, line 69
def local_index_coefficients
  coefficients = []
  component.array_size.reverse.inject(1) do |total, size|
    coefficients.unshift(total)
    total * size
  end
  coefficients
end
local_register_index(offset) click to toggle source
# File lib/rggen/systemverilog/rtl/register_index.rb, line 95
def local_register_index(offset)
  (component.array? || nil) &&
    product([component.count(false), offset || local_index], true)
end
product(operands, need_bracket) click to toggle source
# File lib/rggen/systemverilog/rtl/register_index.rb, line 100
def product(operands, need_bracket)
  if operands.all?(&method(:integer?))
    operands.reduce(:*)
  elsif operands.first == 1
    operands.last
  elsif need_bracket
    "#{operands.first}*(#{operands.last})"
  else
    operands.join('*')
  end
end
reduce_indices(indices) click to toggle source
# File lib/rggen/systemverilog/rtl/register_index.rb, line 87
def reduce_indices(indices)
  if indices.empty? || indices.all?(&method(:integer?))
    indices.sum
  else
    indices.join('+')
  end
end
upper_register_file() click to toggle source
# File lib/rggen/systemverilog/rtl/register_index.rb, line 65
def upper_register_file
  component.register_file
end