# SPDX-License-Identifier: GPL-2.0
#
# Copyright (C) 2022-2026, Advanced Micro Devices, Inc.
#

ROOT := $(src)

ccflags-y += -I$(ROOT)/
# uAPI - use -iquote to prioritize local header over in-tree kernel header
ccflags-y += -iquote$(ROOT)/../../../include/uapi
# version.h and trace headers - use -iquote to prioritize over in-tree kernel headers
ccflags-y += -iquote$(ROOT)/../../../include
# For define_trace.h re-inclusion with TRACE_INCLUDE_PATH=.
ccflags-y += -iquote$(ROOT)/../../../include/trace/events
# Make every C file in this dir see config-kernel.h
ccflags-y += -include $(ROOT)/config_kernel.h

# All warning will report as error and debug build
ccflags-y += -g -Werror

ccflags-${UMQ_HELLO_TEST} += -DUMQ_HELLO_TEST

obj-m	+= amdxdna.o
# Only objects that have corresponding .c sources in this directory
amdxdna-y := \
	amdxdna_ctx.o \
	amdxdna_drm.o \
	amdxdna_gem.o \
	amdxdna_iommu.o \
	amdxdna_mailbox_helper.o \
	amdxdna_pm.o \
	amdxdna_sysfs.o \
	amdxdna_ubuf.o \
	amdxdna_cbuf.o \
	amdxdna_cma_buf.o \
	amdxdna_xen.o \
	amdxdna_sensors.o

amdxdna-y += \
	aie.o \
	aie4_ctx.o \
	aie4_error.o \
	aie4_message.o \
	amdxdna_dpt.o \
	amdxdna_error.o \
	amdxdna_coredump.o \
	amdxdna_ctx_status.o \
	amdxdna_tile_read_write.o

# The aie2 PCI driver uses the DRM GPU scheduler; the platform (aie4) build
# targets non-PCI parts whose kernels may be built without DRM_SCHED, so the
# aie2 driver, its PSP/SMU layer and its PCI register tables are not compiled
# there. (aie.o is the shared mgmt-mailbox layer and stays in both builds.)
ifeq ($(CONFIG_DRM_ACCEL_AMDXDNA_PLAT),)
amdxdna-y += \
	aie_psp.o \
	aie_smu.o \
	aie2_ctx.o \
	aie2_error.o \
	aie2_message.o \
	aie2_pci.o \
	aie2_pm.o \
	aie2_solver.o \
	aie2_tdr.o \
	npu1_regs.o \
	npu4_regs.o \
	npu5_regs.o \
	npu6_regs.o
endif

# Transport select: the platform build compiles the transport-independent aie4
# core, the shmem+IPI mailbox and the platform driver, and drops the PCI
# transport, the PCI ringbuf+MSI-X mailbox and the PCI module entry; the default
# build keeps the PCI side. amdxdna_mailbox.o and amdxdna_mailbox_plat.o both
# provide struct mailbox and the amdxdna_mailbox.h API, and each side provides
# the same aie4 symbols and the single module entry point, so only one is built.
# Out-of-tree bridge: in-tree, Kconfig makes CONFIG_DRM_ACCEL_AMDXDNA_PLAT a C
# macro via autoconf.h, so IS_ENABLED() works. Here it is only a Make variable,
# so define the macro ourselves; the source keeps using IS_ENABLED() unchanged.
ifneq ($(CONFIG_DRM_ACCEL_AMDXDNA_PLAT),)
ccflags-y += -DCONFIG_DRM_ACCEL_AMDXDNA_PLAT=1
endif

amdxdna-$(CONFIG_DRM_ACCEL_AMDXDNA_PLAT) += \
	aie4.o \
	aie4_debugfs.o \
	aie4_dpt.o \
	aie4_plat.o \
	amdxdna_dpt_plat.o \
	amdxdna_mailbox_plat.o \
	amdxdna_plat_drv.o \
	npu12_regs.o

ifeq ($(CONFIG_DRM_ACCEL_AMDXDNA_PLAT),)
amdxdna-y += \
	aie4_pci.o \
	amdxdna_dpt_pci.o \
	amdxdna_mailbox.o \
	amdxdna_pci_drv.o \
	npu3_regs.o

# SR-IOV is PCI-only (to_pci_dev()/pci_enable_sriov()/PCI config space), so keep
# it in the PCI-only branch: the platform module must not pull it in even when
# CONFIG_PCI_IOV is set.
amdxdna-$(CONFIG_PCI_IOV) += \
	aie4_sriov.o
endif

amdxdna-$(CONFIG_DEBUG_FS) += \
	amdxdna_debugfs.o
