// Copyright (C) 2023-2025 Intel Corporation
// SPDX-License-Identifier: Apache-2.0
include "memoryManagement.fbs";
include "software.fbs";
include "dma.fbs";

namespace MVCNN;

/// Note: This file is not well-defined.
/// Generally modelled around v2 infrastructure for software layers.
//
//

union NCE1Layer {
  NCE1Conv,
  NCE1Pool,
  NCE1FCL
}

table NCE1Task {
  layer: NCE1Layer;
}

table NCE1Conv{
  streamingMask: uint;
  inputSize: uint;
  outputSize: uint;
  concatOffset: uint;
  unloadCMX: uint;
  overwriteInput: uint;
  CMXSize: uint;
  reluSHVAcc: uint;
  shvNegSlope: uint;
  shvPosSlope: uint;
  desc_count: uint;
  descriptors: [byte];
  input : Tensor;
  output : Tensor;
  weight : Tensor;
  bias : Tensor;
}

table NCE1Pool{
  streamingMask: uint;
  inputSize: uint;
  outputSize: uint;
  concatOffset: uint;
  unloadCMX: uint;
  overwriteInput: uint;
  CMXSize: uint;
  reluSHVAcc: uint;
  shvNegSlope: uint;
  shvPosSlope: uint;
  desc_count: uint;
  descriptors: [byte];
  input : Tensor;
  output : Tensor;
  weight : Tensor;
  bias : Tensor;
}

table NCE1FCL{
  streamingMask: uint;
  inputSize: uint;
  outputSize: uint;
  concatOffset: uint;
  unloadCMX: uint;
  overwriteInput: uint;
  CMXSize: uint;
  reluSHVAcc: uint;
  shvNegSlope: uint;
  shvPosSlope: uint;
  desc_count: uint;
  descriptors: [byte];
  input : Tensor;
  output : Tensor;
  weight : Tensor;
  bias : Tensor;
}
