%global pkgvers 1 %global scdate0 20200818 %global schash0 06e1a6cbe1979db94c49e34bc47c0dbe304883db %global branch0 master %global source0 https://github.com/Qucs/ADMS.git %global sshort0 %{expand:%%{lua:print(('%{schash0}'):sub(1,8))}} Name: mot-adms Version: 2.3.7 Release: %{scdate0}.%{pkgvers}.git%{sshort0}%{?dist} Summary: An electrical compact device models converter License: GPLv3+ URL: https://github.com/Qucs/ADMS BuildRequires: make gcc-c++ flex bison automake autoconf BuildRequires: git libtool perl(XML::LibXML) %description ADMS is a code generator that converts electrical compact device models specified in high-level description language into ready-to-compile C code for the API of spice simulators. Based on transformations specified in XML language, ADMS transforms Verilog-AMS code into other target languages. %prep %setup -T -c -n %{name} git clone --depth 1 -n -b %{branch0} %{source0} . git fetch --depth 1 origin %{schash0} git reset --hard %{schash0} git log --format=fuller %build autoreconf -vif %configure --enable-maintainer-mode --disable-silent-rules make clean make -C admsXml \ admstpathYacc.h \ preprocessorYacc.h \ verilogaYacc.y \ %{nil} %make_build %install %make_install find %{buildroot} -type l -name '*.so' -delete find %{buildroot} -type f '(' -name '*.la' -or -name '*.a' ')' -delete %files %license COPYING %doc AUTHORS %doc ChangeLog %doc README.md %doc TODO %{_bindir}/admsCheck %{_bindir}/admsXml %{_libdir}/libadms*.so.* %dir %{_includedir}/adms %{_includedir}/adms/*.vams %{_mandir}/man1/admsCheck.1* %{_mandir}/man1/admsXml.1* %changelog * Mon Mar 18 2019 Balint Cristian - github update releases