33#define _AVR_POWER_H_ 1
547#if defined(__AVR_HAVE_PRR_PRADC)
548#define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
549#define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
552#if defined(__AVR_HAVE_PRR_PRCAN)
553#define power_can_enable() (PRR &= (uint8_t)~(1 << PRCAN))
554#define power_can_disable() (PRR |= (uint8_t)(1 << PRCAN))
557#if defined(__AVR_HAVE_PRR_PRLCD)
558#define power_lcd_enable() (PRR &= (uint8_t)~(1 << PRLCD))
559#define power_lcd_disable() (PRR |= (uint8_t)(1 << PRLCD))
562#if defined(__AVR_HAVE_PRR_PRLIN)
563#define power_lin_enable() (PRR &= (uint8_t)~(1 << PRLIN))
564#define power_lin_disable() (PRR |= (uint8_t)(1 << PRLIN))
567#if defined(__AVR_HAVE_PRR_PRPSC)
568#define power_psc_enable() (PRR &= (uint8_t)~(1 << PRPSC))
569#define power_psc_disable() (PRR |= (uint8_t)(1 << PRPSC))
572#if defined(__AVR_HAVE_PRR_PRPSC0)
573#define power_psc0_enable() (PRR &= (uint8_t)~(1 << PRPSC0))
574#define power_psc0_disable() (PRR |= (uint8_t)(1 << PRPSC0))
577#if defined(__AVR_HAVE_PRR_PRPSC1)
578#define power_psc1_enable() (PRR &= (uint8_t)~(1 << PRPSC1))
579#define power_psc1_disable() (PRR |= (uint8_t)(1 << PRPSC1))
582#if defined(__AVR_HAVE_PRR_PRPSC2)
583#define power_psc2_enable() (PRR &= (uint8_t)~(1 << PRPSC2))
584#define power_psc2_disable() (PRR |= (uint8_t)(1 << PRPSC2))
587#if defined(__AVR_HAVE_PRR_PRPSCR)
588#define power_pscr_enable() (PRR &= (uint8_t)~(1 << PRPSCR))
589#define power_pscr_disable() (PRR |= (uint8_t)(1 << PRPSCR))
592#if defined(__AVR_HAVE_PRR_PRSPI)
593#define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
594#define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
597#if defined(__AVR_HAVE_PRR_PRTIM0)
598#define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
599#define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
602#if defined(__AVR_HAVE_PRR_PRTIM1)
603#define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
604#define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
607#if defined(__AVR_HAVE_PRR_PRTIM2)
608#define power_timer2_enable() (PRR &= (uint8_t)~(1 << PRTIM2))
609#define power_timer2_disable() (PRR |= (uint8_t)(1 << PRTIM2))
612#if defined(__AVR_HAVE_PRR_PRTWI)
613#define power_twi_enable() (PRR &= (uint8_t)~(1 << PRTWI))
614#define power_twi_disable() (PRR |= (uint8_t)(1 << PRTWI))
617#if defined(__AVR_HAVE_PRR_PRUSART)
618#define power_usart_enable() (PRR &= (uint8_t)~(1 << PRUSART))
619#define power_usart_disable() (PRR |= (uint8_t)(1 << PRUSART))
622#if defined(__AVR_HAVE_PRR_PRUSART0)
623#define power_usart0_enable() (PRR &= (uint8_t)~(1 << PRUSART0))
624#define power_usart0_disable() (PRR |= (uint8_t)(1 << PRUSART0))
627#if defined(__AVR_HAVE_PRR_PRUSART1)
628#define power_usart1_enable() (PRR &= (uint8_t)~(1 << PRUSART1))
629#define power_usart1_disable() (PRR |= (uint8_t)(1 << PRUSART1))
632#if defined(__AVR_HAVE_PRR_PRUSI)
633#define power_usi_enable() (PRR &= (uint8_t)~(1 << PRUSI))
634#define power_usi_disable() (PRR |= (uint8_t)(1 << PRUSI))
637#if defined(__AVR_HAVE_PRR0_PRADC)
638#define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
639#define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
642#if defined(__AVR_HAVE_PRR0_PRC0)
643#define power_clock_output_enable() (PRR0 &= (uint8_t)~(1 << PRCO))
644#define power_clock_output_disable() (PRR0 |= (uint8_t)(1 << PRCO))
647#if defined(__AVR_HAVE_PRR0_PRCRC)
648#define power_crc_enable() (PRR0 &= (uint8_t)~(1 << PRCRC))
649#define power_crc_disable() (PRR0 |= (uint8_t)(1 << PRCRC))
652#if defined(__AVR_HAVE_PRR0_PRCU)
653#define power_crypto_enable() (PRR0 &= (uint8_t)~(1 << PRCU))
654#define power_crypto_disable() (PRR0 |= (uint8_t)(1 << PRCU))
657#if defined(__AVR_HAVE_PRR0_PRDS)
658#define power_irdriver_enable() (PRR0 &= (uint8_t)~(1 << PRDS))
659#define power_irdriver_disable() (PRR0 |= (uint8_t)(1 << PRDS))
662#if defined(__AVR_HAVE_PRR0_PRLFR)
663#define power_lfreceiver_enable() (PRR0 &= (uint8_t)~(1 << PRLFR))
664#define power_lfreceiver_disable() (PRR0 |= (uint8_t)(1 << PRLFR))
667#if defined(__AVR_HAVE_PRR0_PRLFRS)
668#define power_lfrs_enable() (PRR0 &= (uint8_t)~(1 << PRLFRS))
669#define power_lfrs_disable() (PRR0 |= (uint8_t)(1 << PRLFRS))
672#if defined(__AVR_HAVE_PRR0_PRLIN)
673#define power_lin_enable() (PRR0 &= (uint8_t)~(1 << PRLIN))
674#define power_lin_disable() (PRR0 |= (uint8_t)(1 << PRLIN))
677#if defined(__AVR_HAVE_PRR0_PRPGA)
678#define power_pga_enable() (PRR0 &= (uint8_t)~(1 << PRPGA))
679#define power_pga_disable() (PRR0 |= (uint8_t)(1 << PRPGA))
682#if defined(__AVR_HAVE_PRR0_PRRXDC)
683#define power_receive_dsp_control_enable() (PRR0 &= (uint8_t)~(1 << PRRXDC))
684#define power_receive_dsp_control_disable() (PRR0 |= (uint8_t)(1 << PRRXDC))
687#if defined(__AVR_HAVE_PRR0_PRSPI)
688#define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
689#define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
692#if defined(__AVR_HAVE_PRR0_PRT0)
693#define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRT0))
694#define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRT0))
697#if defined(__AVR_HAVE_PRR0_PRTIM0)
698#define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
699#define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
702#if defined(__AVR_HAVE_PRR0_PRT1)
703#define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRT1))
704#define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRT1))
707#if defined(__AVR_HAVE_PRR0_PRTIM1)
708#define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
709#define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
712#if defined(__AVR_HAVE_PRR0_PRT2)
713#define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRT2))
714#define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRT2))
717#if defined(__AVR_HAVE_PRR0_PRTIM2)
718#define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
719#define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
722#if defined(__AVR_HAVE_PRR0_PRT3)
723#define power_timer3_enable() (PRR0 &= (uint8_t)~(1 << PRT3))
724#define power_timer3_disable() (PRR0 |= (uint8_t)(1 << PRT3))
727#if defined(__AVR_HAVE_PRR0_PRTM)
728#define power_timermodulator_enable() (PRR0 &= (uint8_t)~(1 << PRTM))
729#define power_timermodulator_disable() (PRR0 |= (uint8_t)(1 << PRTM))
732#if defined(__AVR_HAVE_PRR0_PRTWI)
733#define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
734#define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
737#if defined(__AVR_HAVE_PRR0_PRTWI1)
738#define power_twi1_enable() (PRR0 &= (uint8_t)~(1 << PRTWI1))
739#define power_twi1_disable() (PRR0 |= (uint8_t)(1 << PRTWI1))
742#if defined(__AVR_HAVE_PRR0_PRTXDC)
743#define power_transmit_dsp_control_enable() (PRR0 &= (uint8_t)~(1 << PRTXDC))
744#define power_transmit_dsp_control_disable() (PRR0 |= (uint8_t)(1 << PRTXDC))
747#if defined(__AVR_HAVE_PRR0_PRUSART0)
748#define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
749#define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
752#if defined(__AVR_HAVE_PRR0_PRUSART1)
753#define power_usart1_enable() (PRR0 &= (uint8_t)~(1 << PRUSART1))
754#define power_usart1_disable() (PRR0 |= (uint8_t)(1 << PRUSART1))
757#if defined(__AVR_HAVE_PRR0_PRVADC)
758#define power_vadc_enable() (PRR0 &= (uint8_t)~(1 << PRVADC))
759#define power_vadc_disable() (PRR0 |= (uint8_t)(1 << PRVADC))
762#if defined(__AVR_HAVE_PRR0_PRVM)
763#define power_voltage_monitor_enable() (PRR0 &= (uint8_t)~(1 << PRVM))
764#define power_voltage_monitor_disable() (PRR0 |= (uint8_t)(1 << PRVM))
767#if defined(__AVR_HAVE_PRR0_PRVRM)
768#define power_vrm_enable() (PRR0 &= (uint8_t)~(1 << PRVRM))
769#define power_vrm_disable() (PRR0 |= (uint8_t)(1 << PRVRM))
772#if defined(__AVR_HAVE_PRR1_PRAES)
773#define power_aes_enable() (PRR1 &= (uint8_t)~(1 << PRAES))
774#define power_aes_disable() (PRR1 |= (uint8_t)(1 << PRAES))
777#if defined(__AVR_HAVE_PRR1_PRCI)
778#define power_cinterface_enable() (PRR1 &= (uint8_t)~(1 << PRCI))
779#define power_cinterface_disable() (PRR1 |= (uint8_t)(1 << PRCI))
782#if defined(__AVR_HAVE_PRR1_PRHSSPI)
783#define power_hsspi_enable() (PRR1 &= (uint8_t)~(1 << PRHSSPI))
784#define power_hsspi_disable() (PRR1 |= (uint8_t)(1 << PRHSSPI))
787#if defined(__AVR_HAVE_PRR1_PRKB)
788#define power_kb_enable() (PRR1 &= (uint8_t)~(1 << PRKB))
789#define power_kb_disable() (PRR1 |= (uint8_t)(1 << PRKB))
792#if defined(__AVR_HAVE_PRR1_PRLFPH)
793#define power_lfph_enable() (PRR1 &= (uint8_t)~(1 << PRLFPH))
794#define power_lfph_disable() (PRR1 |= (uint8_t)(1 << PRLFPH))
797#if defined(__AVR_HAVE_PRR1_PRLFR)
798#define power_lfreceiver_enable() (PRR1 &= (uint8_t)~(1 << PRLFR))
799#define power_lfreceiver_disable() (PRR1 |= (uint8_t)(1 << PRLFR))
802#if defined(__AVR_HAVE_PRR1_PRLFTP)
803#define power_lftp_enable() (PRR1 &= (uint8_t)~(1 << PRLFTP))
804#define power_lftp_disable() (PRR1 |= (uint8_t)(1 << PRLFTP))
807#if defined(__AVR_HAVE_PRR1_PRSCI)
808#define power_sci_enable() (PRR1 &= (uint8_t)~(1 << PRSCI))
809#define power_sci_disable() (PRR1 |= (uint8_t)(1 << PRSCI))
812#if defined(__AVR_HAVE_PRR1_PRSPI)
813#define power_spi_enable() (PRR1 &= (uint8_t)~(1 << PRSPI))
814#define power_spi_disable() (PRR1 |= (uint8_t)(1 << PRSPI))
817#if defined(__AVR_HAVE_PRR1_PRT1)
818#define power_timer1_enable() (PRR1 &= (uint8_t)~(1 << PRT1))
819#define power_timer1_disable() (PRR1 |= (uint8_t)(1 << PRT1))
822#if defined(__AVR_HAVE_PRR1_PRT2)
823#define power_timer2_enable() (PRR1 &= (uint8_t)~(1 << PRT2))
824#define power_timer2_disable() (PRR1 |= (uint8_t)(1 << PRT2))
827#if defined(__AVR_HAVE_PRR1_PRT3)
828#define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRT3))
829#define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRT3))
832#if defined(__AVR_HAVE_PRR1_PRT4)
833#define power_timer4_enable() (PRR1 &= (uint8_t)~(1 << PRT4))
834#define power_timer4_disable() (PRR1 |= (uint8_t)(1 << PRT4))
837#if defined(__AVR_HAVE_PRR1_PRT5)
838#define power_timer5_enable() (PRR1 &= (uint8_t)~(1 << PRT5))
839#define power_timer5_disable() (PRR1 |= (uint8_t)(1 << PRT5))
842#if defined(__AVR_HAVE_PRR1_PRTIM3)
843#define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
844#define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
847#if defined(__AVR_HAVE_PRR1_PRTIM4)
848#define power_timer4_enable() (PRR1 &= (uint8_t)~(1 << PRTIM4))
849#define power_timer4_disable() (PRR1 |= (uint8_t)(1 << PRTIM4))
852#if defined(__AVR_HAVE_PRR1_PRTIM5)
853#define power_timer5_enable() (PRR1 &= (uint8_t)~(1 << PRTIM5))
854#define power_timer5_disable() (PRR1 |= (uint8_t)(1 << PRTIM5))
857#if defined(__AVR_HAVE_PRR1_PRTRX24)
858#define power_transceiver_enable() (PRR1 &= (uint8_t)~(1 << PRTRX24))
859#define power_transceiver_disable() (PRR1 |= (uint8_t)(1 << PRTRX24))
862#if defined(__AVR_HAVE_PRR1_PRUSART1)
863#define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
864#define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
867#if defined(__AVR_HAVE_PRR1_PRUSART2)
868#define power_usart2_enable() (PRR1 &= (uint8_t)~(1 << PRUSART2))
869#define power_usart2_disable() (PRR1 |= (uint8_t)(1 << PRUSART2))
872#if defined(__AVR_HAVE_PRR1_PRUSART3)
873#define power_usart3_enable() (PRR1 &= (uint8_t)~(1 << PRUSART3))
874#define power_usart3_disable() (PRR1 |= (uint8_t)(1 << PRUSART3))
877#if defined(__AVR_HAVE_PRR1_PRUSB)
878#define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
879#define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
882#if defined(__AVR_HAVE_PRR1_PRUSBH)
883#define power_usbh_enable() (PRR1 &= (uint8_t)~(1 << PRUSBH))
884#define power_usbh_disable() (PRR1 |= (uint8_t)(1 << PRUSBH))
887#if defined(__AVR_HAVE_PRR2_PRDF)
888#define power_data_fifo_enable() (PRR2 &= (uint8_t)~(1 << PRDF))
889#define power_data_fifo_disable() (PRR2 |= (uint8_t)(1 << PRDF))
892#if defined(__AVR_HAVE_PRR2_PRIDS)
893#define power_id_scan_enable() (PRR2 &= (uint8_t)~(1 << PRIDS))
894#define power_id_scan_disable() (PRR2 |= (uint8_t)(1 << PRIDS))
897#if defined(__AVR_HAVE_PRR2_PRRAM0)
898#define power_ram0_enable() (PRR2 &= (uint8_t)~(1 << PRRAM0))
899#define power_ram0_disable() (PRR2 |= (uint8_t)(1 << PRRAM0))
902#if defined(__AVR_HAVE_PRR2_PRRAM1)
903#define power_ram1_enable() (PRR2 &= (uint8_t)~(1 << PRRAM1))
904#define power_ram1_disable() (PRR2 |= (uint8_t)(1 << PRRAM1))
907#if defined(__AVR_HAVE_PRR2_PRRAM2)
908#define power_ram2_enable() (PRR2 &= (uint8_t)~(1 << PRRAM2))
909#define power_ram2_disable() (PRR2 |= (uint8_t)(1 << PRRAM2))
912#if defined(__AVR_HAVE_PRR2_PRRAM3)
913#define power_ram3_enable() (PRR2 &= (uint8_t)~(1 << PRRAM3))
914#define power_ram3_disable() (PRR2 |= (uint8_t)(1 << PRRAM3))
917#if defined(__AVR_HAVE_PRR2_PRRS)
918#define power_rssi_buffer_enable() (PRR2 &= (uint8_t)~(1 << PRRS))
919#define power_rssi_buffer_disable() (PRR2 |= (uint8_t)(1 << PRRS))
922#if defined(__AVR_HAVE_PRR2_PRSF)
923#define power_preamble_rssi_fifo_enable() (PRR2 &= (uint8_t)~(1 << PRSF))
924#define power_preamble_rssi_fifo_disable() (PRR2 |= (uint8_t)(1 << PRSF))
927#if defined(__AVR_HAVE_PRR2_PRSPI2)
928#define power_spi2_enable() (PRR2 &= (uint8_t)~(1 << PRSPI2))
929#define power_spi2_disable() (PRR2 |= (uint8_t)(1 << PRSPI2))
932#if defined(__AVR_HAVE_PRR2_PRSSM)
933#define power_sequencer_state_machine_enable() (PRR2 &= (uint8_t)~(1 << PRSSM))
934#define power_sequencer_state_machine_disable() (PRR2 |= (uint8_t)(1 << PRSSM))
937#if defined(__AVR_HAVE_PRR2_PRTM)
938#define power_tx_modulator_enable() (PRR2 &= (uint8_t)~(1 << PRTM))
939#define power_tx_modulator_disable() (PRR2 |= (uint8_t)(1 << PRTM))
942#if defined(__AVR_HAVE_PRR2_PRTWI2)
943#define power_twi2_enable() (PRR2 &= (uint8_t)~(1 << PRTWI2))
944#define power_twi2_disable() (PRR2 |= (uint8_t)(1 << PRTWI2))
947#if defined(__AVR_HAVE_PRR2_PRXA)
948#define power_rx_buffer_A_enable() (PRR2 &= (uint8_t)~(1 << PRXA))
949#define power_rx_buffer_A_disable() (PRR2 |= (uint8_t)(1 << PRXA))
952#if defined(__AVR_HAVE_PRR2_PRXB)
953#define power_rx_buffer_B_enable() (PRR2 &= (uint8_t)~(1 << PRXB))
954#define power_rx_buffer_B_disable() (PRR2 |= (uint8_t)(1 << PRXB))
957#if defined(__AVR_HAVE_PRGEN_AES)
958#define power_aes_enable() (PR_PRGEN &= (uint8_t)~(PR_AES_bm))
959#define power_aes_disable() (PR_PRGEN |= (uint8_t)PR_AES_bm)
962#if defined(__AVR_HAVE_PRGEN_DMA)
963#define power_dma_enable() (PR_PRGEN &= (uint8_t)~(PR_DMA_bm))
964#define power_dma_disable() (PR_PRGEN |= (uint8_t)PR_DMA_bm)
967#if defined(__AVR_HAVE_PRGEN_EBI)
968#define power_ebi_enable() (PR_PRGEN &= (uint8_t)~(PR_EBI_bm))
969#define power_ebi_disable() (PR_PRGEN |= (uint8_t)PR_EBI_bm)
972#if defined(__AVR_HAVE_PRGEN_EDMA)
973#define power_edma_enable() (PR_PRGEN &= (uint8_t)~(PR_EDMA_bm))
974#define power_edma_disable() (PR_PRGEN |= (uint8_t)PR_EDMA_bm)
977#if defined(__AVR_HAVE_PRGEN_EVSYS)
978#define power_evsys_enable() (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
979#define power_evsys_disable() (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
982#if defined(__AVR_HAVE_PRGEN_LCD)
983#define power_lcd_enable() (PR_PRGEN &= (uint8_t)~(PR_LCD_bm))
984#define power_lcd_disable() (PR_PRGEN |= (uint8_t)PR_LCD_bm)
987#if defined(__AVR_HAVE_PRGEN_RTC)
988#define power_rtc_enable() (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
989#define power_rtc_disable() (PR_PRGEN |= (uint8_t)PR_RTC_bm)
992#if defined(__AVR_HAVE_PRGEN_USB)
993#define power_usb_enable() (PR_PRGEN &= (uint8_t)~(PR_USB_bm))
994#define power_usb_disable() (PR_PRGEN &= (uint8_t)(PR_USB_bm))
997#if defined(__AVR_HAVE_PRGEN_XCL)
998#define power_xcl_enable() (PR_PRGEN &= (uint8_t)~(PR_XCL_bm))
999#define power_xcl_disable() (PR_PRGEN |= (uint8_t)PR_XCL_bm)
1002#if defined(__AVR_HAVE_PRPA_AC)
1003#define power_aca_enable() (PR_PRPA &= (uint8_t)~(PR_AC_bm))
1004#define power_aca_disable() (PR_PRPA |= (uint8_t)PR_AC_bm)
1007#if defined(__AVR_HAVE_PRPA_ADC)
1008#define power_adca_enable() (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
1009#define power_adca_disable() (PR_PRPA |= (uint8_t)PR_ADC_bm)
1012#if defined(__AVR_HAVE_PRPA_DAC)
1013#define power_daca_enable() (PR_PRPA &= (uint8_t)~(PR_DAC_bm))
1014#define power_daca_disable() (PR_PRPA |= (uint8_t)PR_DAC_bm)
1017#if defined(__AVR_HAVE_PRPB_AC)
1018#define power_acb_enable() (PR_PRPB &= (uint8_t)~(PR_AC_bm))
1019#define power_acb_disable() (PR_PRPB |= (uint8_t)PR_AC_bm)
1022#if defined(__AVR_HAVE_PRPB_ADC)
1023#define power_adcb_enable() (PR_PRPB &= (uint8_t)~(PR_ADC_bm))
1024#define power_adcb_disable() (PR_PRPB |= (uint8_t)PR_ADC_bm)
1027#if defined(__AVR_HAVE_PRPB_DAC)
1028#define power_dacb_enable() (PR_PRPB &= (uint8_t)~(PR_DAC_bm))
1029#define power_dacb_disable() (PR_PRPB |= (uint8_t)PR_DAC_bm)
1032#if defined(__AVR_HAVE_PRPC_HIRES)
1033#define power_hiresc_enable() (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
1034#define power_hiresc_disable() (PR_PRPC |= (uint8_t)PR_HIRES_bm)
1037#if defined(__AVR_HAVE_PRPC_SPI)
1038#define power_spic_enable() (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
1039#define power_spic_disable() (PR_PRPC |= (uint8_t)PR_SPI_bm)
1042#if defined(__AVR_HAVE_PRPC_TC0)
1043#define power_tc0c_enable() (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
1044#define power_tc0c_disable() (PR_PRPC |= (uint8_t)PR_TC0_bm)
1047#if defined(__AVR_HAVE_PRPC_TC1)
1048#define power_tc1c_enable() (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
1049#define power_tc1c_disable() (PR_PRPC |= (uint8_t)PR_TC1_bm)
1052#if defined(__AVR_HAVE_PRPC_TC4)
1053#define power_tc4c_enable() (PR_PRPC &= (uint8_t)~(PR_TC4_bm))
1054#define power_tc4c_disable() (PR_PRPC |= (uint8_t)PR_TC4_bm)
1057#if defined(__AVR_HAVE_PRPC_TC5)
1058#define power_tc5c_enable() (PR_PRPC &= (uint8_t)~(PR_TC5_bm))
1059#define power_tc5c_disable() (PR_PRPC |= (uint8_t)PR_TC5_bm)
1062#if defined(__AVR_HAVE_PRPC_TWI)
1063#define power_twic_enable() (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
1064#define power_twic_disable() (PR_PRPC |= (uint8_t)PR_TWI_bm)
1067#if defined(__AVR_HAVE_PRPC_USART0)
1068#define power_usartc0_enable() (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
1069#define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
1072#if defined(__AVR_HAVE_PRPC_USART1)
1073#define power_usartc1_enable() (PR_PRPC &= (uint8_t)~(PR_USART1_bm))
1074#define power_usartc1_disable() (PR_PRPC |= (uint8_t)PR_USART1_bm)
1077#if defined(__AVR_HAVE_PRPD_HIRES)
1078#define power_hiresd_enable() (PR_PRPD &= (uint8_t)~(PR_HIRES_bm))
1079#define power_hiresd_disable() (PR_PRPD |= (uint8_t)PR_HIRES_bm)
1082#if defined(__AVR_HAVE_PRPD_SPI)
1083#define power_spid_enable() (PR_PRPD &= (uint8_t)~(PR_SPI_bm))
1084#define power_spid_disable() (PR_PRPD |= (uint8_t)PR_SPI_bm)
1087#if defined(__AVR_HAVE_PRPD_TC0)
1088#define power_tc0d_enable() (PR_PRPD &= (uint8_t)~(PR_TC0_bm))
1089#define power_tc0d_disable() (PR_PRPD |= (uint8_t)PR_TC0_bm)
1092#if defined(__AVR_HAVE_PRPD_TC1)
1093#define power_tc1d_enable() (PR_PRPD &= (uint8_t)~(PR_TC1_bm))
1094#define power_tc1d_disable() (PR_PRPD |= (uint8_t)PR_TC1_bm)
1097#if defined(__AVR_HAVE_PRPD_TC5)
1098#define power_tc5d_enable() (PR_PRPD &= (uint8_t)~(PR_TC5_bm))
1099#define power_tc5d_disable() (PR_PRPD |= (uint8_t)PR_TC5_bm)
1102#if defined(__AVR_HAVE_PRPD_TWI)
1103#define power_twid_enable() (PR_PRPD &= (uint8_t)~(PR_TWI_bm))
1104#define power_twid_disable() (PR_PRPD |= (uint8_t)PR_TWI_bm)
1107#if defined(__AVR_HAVE_PRPD_USART0)
1108#define power_usartd0_enable() (PR_PRPD &= (uint8_t)~(PR_USART0_bm))
1109#define power_usartd0_disable() (PR_PRPD |= (uint8_t)PR_USART0_bm)
1112#if defined(__AVR_HAVE_PRPD_USART1)
1113#define power_usartd1_enable() (PR_PRPD &= (uint8_t)~(PR_USART1_bm))
1114#define power_usartd1_disable() (PR_PRPD |= (uint8_t)PR_USART1_bm)
1117#if defined(__AVR_HAVE_PRPE_HIRES)
1118#define power_hirese_enable() (PR_PRPE &= (uint8_t)~(PR_HIRES_bm))
1119#define power_hirese_disable() (PR_PRPE |= (uint8_t)PR_HIRES_bm)
1122#if defined(__AVR_HAVE_PRPE_SPI)
1123#define power_spie_enable() (PR_PRPE &= (uint8_t)~(PR_SPI_bm))
1124#define power_spie_disable() (PR_PRPE |= (uint8_t)PR_SPI_bm)
1127#if defined(__AVR_HAVE_PRPE_TC0)
1128#define power_tc0e_enable() (PR_PRPE &= (uint8_t)~(PR_TC0_bm))
1129#define power_tc0e_disable() (PR_PRPE |= (uint8_t)PR_TC0_bm)
1132#if defined(__AVR_HAVE_PRPE_TC1)
1133#define power_tc1e_enable() (PR_PRPE &= (uint8_t)~(PR_TC1_bm))
1134#define power_tc1e_disable() (PR_PRPE |= (uint8_t)PR_TC1_bm)
1137#if defined(__AVR_HAVE_PRPE_TWI)
1138#define power_twie_enable() (PR_PRPE &= (uint8_t)~(PR_TWI_bm))
1139#define power_twie_disable() (PR_PRPE |= (uint8_t)PR_TWI_bm)
1142#if defined(__AVR_HAVE_PRPE_USART0)
1143#define power_usarte0_enable() (PR_PRPE &= (uint8_t)~(PR_USART0_bm))
1144#define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm)
1147#if defined(__AVR_HAVE_PRPE_USART1)
1148#define power_usarte1_enable() (PR_PRPE &= (uint8_t)~(PR_USART1_bm))
1149#define power_usarte1_disable() (PR_PRPE |= (uint8_t)PR_USART1_bm)
1152#if defined(__AVR_HAVE_PRPF_HIRES)
1153#define power_hiresf_enable() (PR_PRPF &= (uint8_t)~(PR_HIRES_bm))
1154#define power_hiresf_disable() (PR_PRPF |= (uint8_t)PR_HIRES_bm)
1157#if defined(__AVR_HAVE_PRPF_SPI)
1158#define power_spif_enable() (PR_PRPF &= (uint8_t)~(PR_SPI_bm))
1159#define power_spif_disable() (PR_PRPF |= (uint8_t)PR_SPI_bm)
1162#if defined(__AVR_HAVE_PRPF_TC0)
1163#define power_tc0f_enable() (PR_PRPF &= (uint8_t)~(PR_TC0_bm))
1164#define power_tc0f_disable() (PR_PRPF |= (uint8_t)PR_TC0_bm)
1167#if defined(__AVR_HAVE_PRPF_TC1)
1168#define power_tc1f_enable() (PR_PRPF &= (uint8_t)~(PR_TC1_bm))
1169#define power_tc1f_disable() (PR_PRPF |= (uint8_t)PR_TC1_bm)
1172#if defined(__AVR_HAVE_PRPF_TWI)
1173#define power_twif_enable() (PR_PRPF &= (uint8_t)~(PR_TWI_bm))
1174#define power_twif_disable() (PR_PRPF |= (uint8_t)PR_TWI_bm)
1177#if defined(__AVR_HAVE_PRPF_USART0)
1178#define power_usartf0_enable() (PR_PRPF &= (uint8_t)~(PR_USART0_bm))
1179#define power_usartf0_disable() (PR_PRPF |= (uint8_t)PR_USART0_bm)
1182#if defined(__AVR_HAVE_PRPF_USART1)
1183#define power_usartf1_enable() (PR_PRPF &= (uint8_t)~(PR_USART1_bm))
1184#define power_usartf1_disable() (PR_PRPF |= (uint8_t)PR_USART1_bm)
1191#ifdef __AVR_HAVE_PRR
1192 PRR &= (
uint8_t)~(__AVR_HAVE_PRR);
1195#ifdef __AVR_HAVE_PRR0
1196 PRR0 &= (
uint8_t)~(__AVR_HAVE_PRR0);
1199#ifdef __AVR_HAVE_PRR1
1200 PRR1 &= (
uint8_t)~(__AVR_HAVE_PRR1);
1203#ifdef __AVR_HAVE_PRR2
1204 PRR2 &= (
uint8_t)~(__AVR_HAVE_PRR2);
1207#ifdef __AVR_HAVE_PRGEN
1208 PR_PRGEN &= (
uint8_t)~(__AVR_HAVE_PRGEN);
1211#ifdef __AVR_HAVE_PRPA
1212 PR_PRPA &= (
uint8_t)~(__AVR_HAVE_PRPA);
1215#ifdef __AVR_HAVE_PRPB
1216 PR_PRPB &= (
uint8_t)~(__AVR_HAVE_PRPB);
1219#ifdef __AVR_HAVE_PRPC
1220 PR_PRPC &= (
uint8_t)~(__AVR_HAVE_PRPC);
1223#ifdef __AVR_HAVE_PRPD
1224 PR_PRPD &= (
uint8_t)~(__AVR_HAVE_PRPD);
1227#ifdef __AVR_HAVE_PRPE
1228 PR_PRPE &= (
uint8_t)~(__AVR_HAVE_PRPE);
1231#ifdef __AVR_HAVE_PRPF
1232 PR_PRPF &= (
uint8_t)~(__AVR_HAVE_PRPF);
1238__power_all_disable()
1240#ifdef __AVR_HAVE_PRR
1241 PRR |= (
uint8_t)(__AVR_HAVE_PRR);
1244#ifdef __AVR_HAVE_PRR0
1245 PRR0 |= (
uint8_t)(__AVR_HAVE_PRR0);
1248#ifdef __AVR_HAVE_PRR1
1249 PRR1 |= (
uint8_t)(__AVR_HAVE_PRR1);
1252#ifdef __AVR_HAVE_PRR2
1253 PRR2 |= (
uint8_t)(__AVR_HAVE_PRR2);
1256#ifdef __AVR_HAVE_PRGEN
1257 PR_PRGEN |= (
uint8_t)(__AVR_HAVE_PRGEN);
1260#ifdef __AVR_HAVE_PRPA
1261 PR_PRPA |= (
uint8_t)(__AVR_HAVE_PRPA);
1264#ifdef __AVR_HAVE_PRPB
1265 PR_PRPB |= (
uint8_t)(__AVR_HAVE_PRPB);
1268#ifdef __AVR_HAVE_PRPC
1269 PR_PRPC |= (
uint8_t)(__AVR_HAVE_PRPC);
1272#ifdef __AVR_HAVE_PRPD
1273 PR_PRPD |= (
uint8_t)(__AVR_HAVE_PRPD);
1276#ifdef __AVR_HAVE_PRPE
1277 PR_PRPE |= (
uint8_t)(__AVR_HAVE_PRPE);
1280#ifdef __AVR_HAVE_PRPF
1281 PR_PRPF |= (
uint8_t)(__AVR_HAVE_PRPF);
1286#ifndef power_all_enable
1287#define power_all_enable() __power_all_enable()
1290#ifndef power_all_disable
1291#define power_all_disable() __power_all_disable()
1296#if defined(__AVR_AT90CAN32__) \
1297|| defined(__AVR_AT90CAN64__) \
1298|| defined(__AVR_AT90CAN128__) \
1299|| defined(__AVR_AT90PWM1__) \
1300|| defined(__AVR_AT90PWM2__) \
1301|| defined(__AVR_AT90PWM2B__) \
1302|| defined(__AVR_AT90PWM3__) \
1303|| defined(__AVR_AT90PWM3B__) \
1304|| defined(__AVR_AT90PWM81__) \
1305|| defined(__AVR_AT90PWM161__) \
1306|| defined(__AVR_AT90PWM216__) \
1307|| defined(__AVR_AT90PWM316__) \
1308|| defined(__AVR_AT90SCR100__) \
1309|| defined(__AVR_AT90USB646__) \
1310|| defined(__AVR_AT90USB647__) \
1311|| defined(__AVR_AT90USB82__) \
1312|| defined(__AVR_AT90USB1286__) \
1313|| defined(__AVR_AT90USB1287__) \
1314|| defined(__AVR_AT90USB162__) \
1315|| defined(__AVR_ATA5505__) \
1316|| defined(__AVR_ATA5272__) \
1317|| defined(__AVR_ATmega1280__) \
1318|| defined(__AVR_ATmega1281__) \
1319|| defined(__AVR_ATmega1284__) \
1320|| defined(__AVR_ATmega128RFA1__) \
1321|| defined(__AVR_ATmega1284RFR2__) \
1322|| defined(__AVR_ATmega128RFR2__) \
1323|| defined(__AVR_ATmega1284P__) \
1324|| defined(__AVR_ATmega162__) \
1325|| defined(__AVR_ATmega164A__) \
1326|| defined(__AVR_ATmega164P__) \
1327|| defined(__AVR_ATmega164PA__) \
1328|| defined(__AVR_ATmega165__) \
1329|| defined(__AVR_ATmega165A__) \
1330|| defined(__AVR_ATmega165P__) \
1331|| defined(__AVR_ATmega165PA__) \
1332|| defined(__AVR_ATmega168__) \
1333|| defined(__AVR_ATmega168P__) \
1334|| defined(__AVR_ATmega168PA__) \
1335|| defined(__AVR_ATmega169__) \
1336|| defined(__AVR_ATmega169A__) \
1337|| defined(__AVR_ATmega169P__) \
1338|| defined(__AVR_ATmega169PA__) \
1339|| defined(__AVR_ATmega16U4__) \
1340|| defined(__AVR_ATmega2560__) \
1341|| defined(__AVR_ATmega2561__) \
1342|| defined(__AVR_ATmega2564RFR2__) \
1343|| defined(__AVR_ATmega256RFR2__) \
1344|| defined(__AVR_ATmega324A__) \
1345|| defined(__AVR_ATmega324P__) \
1346|| defined(__AVR_ATmega325__) \
1347|| defined(__AVR_ATmega325A__) \
1348|| defined(__AVR_ATmega325PA__) \
1349|| defined(__AVR_ATmega3250__) \
1350|| defined(__AVR_ATmega3250A__) \
1351|| defined(__AVR_ATmega3250PA__) \
1352|| defined(__AVR_ATmega328__) \
1353|| defined(__AVR_ATmega328P__) \
1354|| defined(__AVR_ATmega329__) \
1355|| defined(__AVR_ATmega329A__) \
1356|| defined(__AVR_ATmega329P__) \
1357|| defined(__AVR_ATmega329PA__) \
1358|| defined(__AVR_ATmega3290__) \
1359|| defined(__AVR_ATmega3290A__) \
1360|| defined(__AVR_ATmega3290PA__) \
1361|| defined(__AVR_ATmega32C1__) \
1362|| defined(__AVR_ATmega32M1__) \
1363|| defined(__AVR_ATmega32U2__) \
1364|| defined(__AVR_ATmega32U4__) \
1365|| defined(__AVR_ATmega32U6__) \
1366|| defined(__AVR_ATmega48__) \
1367|| defined(__AVR_ATmega48A__) \
1368|| defined(__AVR_ATmega48PA__) \
1369|| defined(__AVR_ATmega48P__) \
1370|| defined(__AVR_ATmega640__) \
1371|| defined(__AVR_ATmega649P__) \
1372|| defined(__AVR_ATmega644__) \
1373|| defined(__AVR_ATmega644A__) \
1374|| defined(__AVR_ATmega644P__) \
1375|| defined(__AVR_ATmega644PA__) \
1376|| defined(__AVR_ATmega645__) \
1377|| defined(__AVR_ATmega645A__) \
1378|| defined(__AVR_ATmega645P__) \
1379|| defined(__AVR_ATmega6450__) \
1380|| defined(__AVR_ATmega6450A__) \
1381|| defined(__AVR_ATmega6450P__) \
1382|| defined(__AVR_ATmega649__) \
1383|| defined(__AVR_ATmega649A__) \
1384|| defined(__AVR_ATmega6490__) \
1385|| defined(__AVR_ATmega6490A__) \
1386|| defined(__AVR_ATmega6490P__) \
1387|| defined(__AVR_ATmega644RFR2__) \
1388|| defined(__AVR_ATmega64RFR2__) \
1389|| defined(__AVR_ATmega88__) \
1390|| defined(__AVR_ATmega88P__) \
1391|| defined(__AVR_ATmega8U2__) \
1392|| defined(__AVR_ATmega16U2__) \
1393|| defined(__AVR_ATmega32U2__) \
1394|| defined(__AVR_ATtiny48__) \
1395|| defined(__AVR_ATtiny167__) \
1396|| defined(__DOXYGEN__)
1464#if defined(__AVR_ATmega128RFA1__) \
1465|| defined(__AVR_ATmega2564RFR2__) \
1466|| defined(__AVR_ATmega1284RFR2__) \
1467|| defined(__AVR_ATmega644RFR2__) \
1468|| defined(__AVR_ATmega256RFR2__) \
1469|| defined(__AVR_ATmega128RFR2__) \
1470|| defined(__AVR_ATmega64RFR2__)
1471 , clock_div_1_rc = 15
1494 __asm__ __volatile__ (
1495 "in __tmp_reg__,__SREG__" "\n\t"
1499 "out __SREG__, __tmp_reg__"
1502 "M" (_SFR_MEM_ADDR(CLKPR)),
1516#define clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
1518#elif defined(__AVR_ATmega16HVB__) \
1519|| defined(__AVR_ATmega16HVBREVB__) \
1520|| defined(__AVR_ATmega32HVB__) \
1521|| defined(__AVR_ATmega32HVBREVB__)
1536 __asm__ __volatile__ (
1537 "in __tmp_reg__,__SREG__" "\n\t"
1541 "out __SREG__, __tmp_reg__"
1544 "M" (_SFR_MEM_ADDR(CLKPR)),
1549#define clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)))
1551#elif defined(__AVR_ATA5790__) \
1552|| defined (__AVR_ATA5795__)
1566static __inline__
void system_clock_prescale_set(clock_div_t)
__attribute__((__always_inline__));
1568void system_clock_prescale_set(clock_div_t __x)
1571 __asm__ __volatile__ (
1572 "in __tmp_reg__,__SREG__" "\n\t"
1576 "out __SREG__, __tmp_reg__"
1579 "I" (_SFR_IO_ADDR(CLKPR)),
1584#define system_clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)))
1588 timer_clock_div_reset = 0,
1589 timer_clock_div_1 = 1,
1590 timer_clock_div_2 = 2,
1591 timer_clock_div_4 = 3,
1592 timer_clock_div_8 = 4,
1593 timer_clock_div_16 = 5,
1594 timer_clock_div_32 = 6,
1595 timer_clock_div_64 = 7
1598static __inline__
void timer_clock_prescale_set(timer_clock_div_t)
__attribute__((__always_inline__));
1600void timer_clock_prescale_set(timer_clock_div_t __x)
1603 __asm__ __volatile__ (
1604 "in __tmp_reg__,__SREG__" "\n\t"
1606 "in %[temp],%[clkpr]" "\n\t"
1607 "out %[clkpr],%[enable]" "\n\t"
1608 "andi %[temp],%[not_CLTPS]" "\n\t"
1609 "or %[temp], %[set_value]" "\n\t"
1610 "out %[clkpr],%[temp]" "\n\t"
1612 "out __SREG__,__tmp_reg__" "\n\t"
1615 [clkpr]
"I" (_SFR_IO_ADDR(CLKPR)),
1616 [enable]
"r" (
_BV(CLKPCE)),
1617 [not_CLTPS]
"M" (0xFF & (~ ((1 << CLTPS2) | (1 << CLTPS1) | (1 << CLTPS0)))),
1618 [set_value]
"r" ((__x & 7) << 3)
1622#define timer_clock_prescale_get() (timer_clock_div_t)(CLKPR & (uint8_t)((1<<CLTPS0)|(1<<CLTPS1)|(1<<CLTPS2)))
1624#elif defined(__AVR_ATA6285__) \
1625|| defined(__AVR_ATA6286__)
1639static __inline__
void system_clock_prescale_set(clock_div_t)
__attribute__((__always_inline__));
1641void system_clock_prescale_set(clock_div_t __x)
1644 __asm__ __volatile__ (
1645 "in __tmp_reg__,__SREG__" "\n\t"
1647 "in %[temp],%[clpr]" "\n\t"
1648 "out %[clpr],%[enable]" "\n\t"
1649 "andi %[temp],%[not_CLKPS]" "\n\t"
1650 "or %[temp], %[set_value]" "\n\t"
1651 "out %[clpr],%[temp]" "\n\t"
1653 "out __SREG__,__tmp_reg__" "\n\t"
1656 [clpr]
"I" (_SFR_IO_ADDR(CLKPR)),
1657 [enable]
"r" _BV(CLPCE),
1658 [not_CLKPS]
"M" (0xFF & (~ ((1 << CLKPS2) | (1 << CLKPS1) | (1 << CLKPS0)))),
1659 [set_value]
"r" (__x & 7)
1663#define system_clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)))
1667 timer_clock_div_reset = 0,
1668 timer_clock_div_1 = 1,
1669 timer_clock_div_2 = 2,
1670 timer_clock_div_4 = 3,
1671 timer_clock_div_8 = 4,
1672 timer_clock_div_16 = 5,
1673 timer_clock_div_32 = 6,
1674 timer_clock_div_64 = 7
1677static __inline__
void timer_clock_prescale_set(timer_clock_div_t)
__attribute__((__always_inline__));
1679void timer_clock_prescale_set(timer_clock_div_t __x)
1682 __asm__ __volatile__ (
1683 "in __tmp_reg__,__SREG__" "\n\t"
1685 "in %[temp],%[clpr]" "\n\t"
1686 "out %[clpr],%[enable]" "\n\t"
1687 "andi %[temp],%[not_CLTPS]" "\n\t"
1688 "or %[temp], %[set_value]" "\n\t"
1689 "out %[clpr],%[temp]" "\n\t"
1691 "out __SREG__,__tmp_reg__" "\n\t"
1694 [clpr]
"I" (_SFR_IO_ADDR(CLKPR)),
1695 [enable]
"r" (
_BV(CLPCE)),
1696 [not_CLTPS]
"M" (0xFF & (~ ((1 << CLTPS2) | (1 << CLTPS1) | (1 << CLTPS0)))),
1697 [set_value]
"r" ((__x & 7) << 3)
1701#define timer_clock_prescale_get() (timer_clock_div_t)(CLKPR & (uint8_t)((1<<CLTPS0)|(1<<CLTPS1)|(1<<CLTPS2)))
1703#elif defined(__AVR_ATtiny24__) \
1704|| defined(__AVR_ATtiny24A__) \
1705|| defined(__AVR_ATtiny44__) \
1706|| defined(__AVR_ATtiny44A__) \
1707|| defined(__AVR_ATtiny84__) \
1708|| defined(__AVR_ATtiny84A__) \
1709|| defined(__AVR_ATtiny25__) \
1710|| defined(__AVR_ATtiny45__) \
1711|| defined(__AVR_ATtiny85__) \
1712|| defined(__AVR_ATtiny261A__) \
1713|| defined(__AVR_ATtiny261__) \
1714|| defined(__AVR_ATtiny461__) \
1715|| defined(__AVR_ATtiny461A__) \
1716|| defined(__AVR_ATtiny861__) \
1717|| defined(__AVR_ATtiny861A__) \
1718|| defined(__AVR_ATtiny2313__) \
1719|| defined(__AVR_ATtiny2313A__) \
1720|| defined(__AVR_ATtiny4313__) \
1721|| defined(__AVR_ATtiny13__) \
1722|| defined(__AVR_ATtiny13A__) \
1723|| defined(__AVR_ATtiny43U__) \
1743 __asm__ __volatile__ (
1744 "in __tmp_reg__,__SREG__" "\n\t"
1748 "out __SREG__, __tmp_reg__"
1751 "I" (_SFR_IO_ADDR(CLKPR)),
1757#define clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
1759#elif defined(__AVR_ATmega64__) \
1760|| defined(__AVR_ATmega103__) \
1761|| defined(__AVR_ATmega128__)
1780 if((__x <= 0) || (__x > 129))
1797 __asm__ __volatile__ (
1798 "in __tmp_reg__,__SREG__" "\n\t"
1800 "out %1, __zero_reg__" "\n\t"
1809 "cpi %0, 0x01" "\n\t"
1811 "ldi %2, 0x81" "\n\t"
1813 "ori %2, 0x80" "\n\t"
1823 "L_%=: " "out __SREG__, __tmp_reg__"
1826 "I" (_SFR_IO_ADDR(XDIV)),
1842 return (clock_div_t)(129 - (XDIV & 0x7F));
1846#elif defined(__AVR_ATtiny4__) \
1847|| defined(__AVR_ATtiny5__) \
1848|| defined(__AVR_ATtiny9__) \
1849|| defined(__AVR_ATtiny10__) \
1850|| defined(__AVR_ATtiny20__) \
1851|| defined(__AVR_ATtiny40__) \
1871 __asm__ __volatile__ (
1872 "in __tmp_reg__,__SREG__" "\n\t"
1876 "out __SREG__, __tmp_reg__"
1879 "I" (_SFR_IO_ADDR(CCP)),
1880 "I" (_SFR_IO_ADDR(CLKPSR)),
1885#define clock_prescale_get() (clock_div_t)(CLKPSR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
void clock_prescale_set(clock_div_t __x)
Definition: power.h:1491
#define _BV(bit)
Definition: sfr_defs.h:208
#define bit_is_clear(sfr, bit)
Definition: sfr_defs.h:245
unsigned char uint8_t
Definition: stdint.h:83
static __inline void __attribute__((__always_inline__)) __power_all_enable()
Definition: power.h:1188
#define clock_prescale_get()
Definition: power.h:1516