Mock Version: 4.1 ENTER ['do_with_status'](['bash', '--login', '-c', '/usr/bin/rpmbuild -bs --target aarch64 --nodeps /builddir/build/SPECS/litex-pythondata-cpu-marocchino.spec'], chrootPath='/var/lib/mock/fedora-37-aarch64-1688731900.202479/root'env={'TERM': 'vt100', 'SHELL': '/bin/bash', 'HOME': '/builddir', 'HOSTNAME': 'mock', 'PATH': '/usr/bin:/bin:/usr/sbin:/sbin', 'PROMPT_COMMAND': 'printf "\\033]0;\\007"', 'PS1': ' \\s-\\v\\$ ', 'LANG': 'C.UTF-8'}shell=Falselogger=timeout=0uid=1001gid=135user='mockbuild'nspawn_args=['--capability=cap_ipc_lock', '--rlimit=RLIMIT_NOFILE=10240', '--capability=cap_ipc_lock', '--bind=/tmp/mock-resolv.261qk1d1:/etc/resolv.conf', '--bind=/dev/btrfs-control', '--bind=/dev/mapper/control', '--bind=/dev/loop-control', '--bind=/dev/loop0', '--bind=/dev/loop1', '--bind=/dev/loop2', '--bind=/dev/loop3', '--bind=/dev/loop4', '--bind=/dev/loop5', '--bind=/dev/loop6', '--bind=/dev/loop7', '--bind=/dev/loop8', '--bind=/dev/loop9', '--bind=/dev/loop10', '--bind=/dev/loop11']unshare_net=FalseprintOutput=True) Using nspawn with args ['--capability=cap_ipc_lock', '--rlimit=RLIMIT_NOFILE=10240', '--capability=cap_ipc_lock', '--bind=/tmp/mock-resolv.261qk1d1:/etc/resolv.conf', '--bind=/dev/btrfs-control', '--bind=/dev/mapper/control', '--bind=/dev/loop-control', '--bind=/dev/loop0', '--bind=/dev/loop1', '--bind=/dev/loop2', '--bind=/dev/loop3', '--bind=/dev/loop4', '--bind=/dev/loop5', '--bind=/dev/loop6', '--bind=/dev/loop7', '--bind=/dev/loop8', '--bind=/dev/loop9', '--bind=/dev/loop10', '--bind=/dev/loop11'] Executing command: ['/usr/bin/systemd-nspawn', '-q', '-M', 'cdfb3150ddf540cd83d34895b4077340', '-D', '/var/lib/mock/fedora-37-aarch64-1688731900.202479/root', '-a', '-u', 'mockbuild', '--capability=cap_ipc_lock', '--rlimit=RLIMIT_NOFILE=10240', '--capability=cap_ipc_lock', '--bind=/tmp/mock-resolv.261qk1d1:/etc/resolv.conf', '--bind=/dev/btrfs-control', '--bind=/dev/mapper/control', '--bind=/dev/loop-control', '--bind=/dev/loop0', '--bind=/dev/loop1', '--bind=/dev/loop2', '--bind=/dev/loop3', '--bind=/dev/loop4', '--bind=/dev/loop5', '--bind=/dev/loop6', '--bind=/dev/loop7', '--bind=/dev/loop8', '--bind=/dev/loop9', '--bind=/dev/loop10', '--bind=/dev/loop11', '--console=pipe', '--setenv=TERM=vt100', '--setenv=SHELL=/bin/bash', '--setenv=HOME=/builddir', '--setenv=HOSTNAME=mock', '--setenv=PATH=/usr/bin:/bin:/usr/sbin:/sbin', '--setenv=PROMPT_COMMAND=printf "\\033]0;\\007"', '--setenv=PS1= \\s-\\v\\$ ', '--setenv=LANG=C.UTF-8', '--resolv-conf=off', 'bash', '--login', '-c', '/usr/bin/rpmbuild -bs --target aarch64 --nodeps /builddir/build/SPECS/litex-pythondata-cpu-marocchino.spec'] with env {'TERM': 'vt100', 'SHELL': '/bin/bash', 'HOME': '/builddir', 'HOSTNAME': 'mock', 'PATH': '/usr/bin:/bin:/usr/sbin:/sbin', 'PROMPT_COMMAND': 'printf "\\033]0;\\007"', 'PS1': ' \\s-\\v\\$ ', 'LANG': 'C.UTF-8', 'SYSTEMD_NSPAWN_TMPFS_TMP': '0', 'SYSTEMD_SECCOMP': '0'} and shell False Building target platforms: aarch64 Building for target aarch64 setting SOURCE_DATE_EPOCH=1642896000 Wrote: /builddir/build/SRPMS/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.src.rpm Child return code was: 0 ENTER ['do_with_status'](['bash', '--login', '-c', '/usr/bin/rpmbuild -bb --target aarch64 --nodeps /builddir/build/SPECS/litex-pythondata-cpu-marocchino.spec'], chrootPath='/var/lib/mock/fedora-37-aarch64-1688731900.202479/root'env={'TERM': 'vt100', 'SHELL': '/bin/bash', 'HOME': '/builddir', 'HOSTNAME': 'mock', 'PATH': '/usr/bin:/bin:/usr/sbin:/sbin', 'PROMPT_COMMAND': 'printf "\\033]0;\\007"', 'PS1': ' \\s-\\v\\$ ', 'LANG': 'C.UTF-8'}shell=Falselogger=timeout=0uid=1001gid=135user='mockbuild'nspawn_args=['--capability=cap_ipc_lock', '--rlimit=RLIMIT_NOFILE=10240', '--capability=cap_ipc_lock', '--bind=/tmp/mock-resolv.261qk1d1:/etc/resolv.conf', '--bind=/dev/btrfs-control', '--bind=/dev/mapper/control', '--bind=/dev/loop-control', '--bind=/dev/loop0', '--bind=/dev/loop1', '--bind=/dev/loop2', '--bind=/dev/loop3', '--bind=/dev/loop4', '--bind=/dev/loop5', '--bind=/dev/loop6', '--bind=/dev/loop7', '--bind=/dev/loop8', '--bind=/dev/loop9', '--bind=/dev/loop10', '--bind=/dev/loop11']unshare_net=FalseprintOutput=True) Using nspawn with args ['--capability=cap_ipc_lock', '--rlimit=RLIMIT_NOFILE=10240', '--capability=cap_ipc_lock', '--bind=/tmp/mock-resolv.261qk1d1:/etc/resolv.conf', '--bind=/dev/btrfs-control', '--bind=/dev/mapper/control', '--bind=/dev/loop-control', '--bind=/dev/loop0', '--bind=/dev/loop1', '--bind=/dev/loop2', '--bind=/dev/loop3', '--bind=/dev/loop4', '--bind=/dev/loop5', '--bind=/dev/loop6', '--bind=/dev/loop7', '--bind=/dev/loop8', '--bind=/dev/loop9', '--bind=/dev/loop10', '--bind=/dev/loop11'] Executing command: ['/usr/bin/systemd-nspawn', '-q', '-M', '1fd61d8b03104e64a5b5fb29a5eba016', '-D', '/var/lib/mock/fedora-37-aarch64-1688731900.202479/root', '-a', '-u', 'mockbuild', '--capability=cap_ipc_lock', '--rlimit=RLIMIT_NOFILE=10240', '--capability=cap_ipc_lock', '--bind=/tmp/mock-resolv.261qk1d1:/etc/resolv.conf', '--bind=/dev/btrfs-control', '--bind=/dev/mapper/control', '--bind=/dev/loop-control', '--bind=/dev/loop0', '--bind=/dev/loop1', '--bind=/dev/loop2', '--bind=/dev/loop3', '--bind=/dev/loop4', '--bind=/dev/loop5', '--bind=/dev/loop6', '--bind=/dev/loop7', '--bind=/dev/loop8', '--bind=/dev/loop9', '--bind=/dev/loop10', '--bind=/dev/loop11', '--console=pipe', '--setenv=TERM=vt100', '--setenv=SHELL=/bin/bash', '--setenv=HOME=/builddir', '--setenv=HOSTNAME=mock', '--setenv=PATH=/usr/bin:/bin:/usr/sbin:/sbin', '--setenv=PROMPT_COMMAND=printf "\\033]0;\\007"', '--setenv=PS1= \\s-\\v\\$ ', '--setenv=LANG=C.UTF-8', '--resolv-conf=off', 'bash', '--login', '-c', '/usr/bin/rpmbuild -bb --target aarch64 --nodeps /builddir/build/SPECS/litex-pythondata-cpu-marocchino.spec'] with env {'TERM': 'vt100', 'SHELL': '/bin/bash', 'HOME': '/builddir', 'HOSTNAME': 'mock', 'PATH': '/usr/bin:/bin:/usr/sbin:/sbin', 'PROMPT_COMMAND': 'printf "\\033]0;\\007"', 'PS1': ' \\s-\\v\\$ ', 'LANG': 'C.UTF-8', 'SYSTEMD_NSPAWN_TMPFS_TMP': '0', 'SYSTEMD_SECCOMP': '0'} and shell False Building target platforms: aarch64 Building for target aarch64 setting SOURCE_DATE_EPOCH=1642896000 Executing(%prep): /bin/sh -e /var/tmp/rpm-tmp.pN0Utn + umask 022 + cd /builddir/build/BUILD + cd /builddir/build/BUILD + rm -rf litex-pythondata-cpu-marocchino + /usr/bin/mkdir -p litex-pythondata-cpu-marocchino + cd litex-pythondata-cpu-marocchino + /usr/bin/chmod -Rf a+rX,u+w,g-w,o-w . + find /builddir/build/BUILD -name SPECPARTS -exec rm -rf '{}' + + git clone --depth 1 -n -b master https://github.com/litex-hub/pythondata-cpu-marocchino.git . Cloning into '.'... + git fetch --depth 1 origin ae64a18899f40607569833c8ad415c768d7fb3dc From https://github.com/litex-hub/pythondata-cpu-marocchino * branch ae64a18899f40607569833c8ad415c768d7fb3dc -> FETCH_HEAD + git reset --hard ae64a18899f40607569833c8ad415c768d7fb3dc HEAD is now at ae64a18 Updating pythondata-cpu-marocchino to 0.0.post209 + git log --format=fuller commit ae64a18899f40607569833c8ad415c768d7fb3dc Author: LiteX Robot AuthorDate: Mon May 30 19:56:17 2022 +0000 Commit: LiteX Robot CommitDate: Mon May 30 19:56:17 2022 +0000 Updating pythondata-cpu-marocchino to 0.0.post209 Updated data to v0.0-67-g6e010fd based on 6e010fd5b1da54632939052e7007c9c412aae6bb from https://github.com/openrisc/or1k_marocchino.git. > commit 6e010fd5b1da54632939052e7007c9c412aae6bb > Author: Andrey Bacherov > Date: Wed Feb 9 10:52:12 2022 +0300 > > Final fix I(D)MMUs super-cache miss detection. Plus some re-factoring. > Updated using 0.0.post142 from https://github.com/litex-hub/litex-data-auto + RPM_EC=0 ++ jobs -p + exit 0 Executing(%build): /bin/sh -e /var/tmp/rpm-tmp.zOW0aV + umask 022 + cd /builddir/build/BUILD + CFLAGS='-O2 -flto=auto -ffat-lto-objects -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection' + export CFLAGS + CXXFLAGS='-O2 -flto=auto -ffat-lto-objects -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection' + export CXXFLAGS + FFLAGS='-O2 -flto=auto -ffat-lto-objects -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -I/usr/lib64/gfortran/modules' + export FFLAGS + FCFLAGS='-O2 -flto=auto -ffat-lto-objects -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -I/usr/lib64/gfortran/modules' + export FCFLAGS + LDFLAGS='-Wl,-z,relro -Wl,--as-needed -Wl,-z,now -specs=/usr/lib/rpm/redhat/redhat-hardened-ld -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -Wl,--build-id=sha1 -specs=/usr/lib/rpm/redhat/redhat-package-notes' + export LDFLAGS + LT_SYS_LIBRARY_PATH=/usr/lib64: + export LT_SYS_LIBRARY_PATH + CC=gcc + export CC + CXX=g++ + export CXX + cd litex-pythondata-cpu-marocchino + CFLAGS='-O2 -flto=auto -ffat-lto-objects -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection' + LDFLAGS='-Wl,-z,relro -Wl,--as-needed -Wl,-z,now -specs=/usr/lib/rpm/redhat/redhat-hardened-ld -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -Wl,--build-id=sha1 -specs=/usr/lib/rpm/redhat/redhat-package-notes' + /usr/bin/python3 setup.py build '--executable=/usr/bin/python3 -sP' running build running build_py creating build creating build/lib creating build/lib/pythondata_cpu_marocchino copying pythondata_cpu_marocchino/__init__.py -> build/lib/pythondata_cpu_marocchino running egg_info creating pythondata_cpu_marocchino.egg-info writing pythondata_cpu_marocchino.egg-info/PKG-INFO writing dependency_links to pythondata_cpu_marocchino.egg-info/dependency_links.txt writing top-level names to pythondata_cpu_marocchino.egg-info/top_level.txt writing manifest file 'pythondata_cpu_marocchino.egg-info/SOURCES.txt' reading manifest file 'pythondata_cpu_marocchino.egg-info/SOURCES.txt' reading manifest template 'MANIFEST.in' warning: no previously-included files matching '*.py[cod]' found anywhere in distribution adding license file 'LICENSE' writing manifest file 'pythondata_cpu_marocchino.egg-info/SOURCES.txt' /usr/lib/python3.11/site-packages/setuptools/command/build_py.py:153: SetuptoolsDeprecationWarning: Installing 'pythondata_cpu_marocchino.verilog' as data is deprecated, please list it in `packages`. !! ############################ # Package would be ignored # ############################ Python recognizes 'pythondata_cpu_marocchino.verilog' as an importable package, but it is not listed in the `packages` configuration of setuptools. 'pythondata_cpu_marocchino.verilog' has been automatically added to the distribution only because it may contain data files, but this behavior is likely to change in future versions of setuptools (and therefore is considered deprecated). Please make sure that 'pythondata_cpu_marocchino.verilog' is included as a package by using the `packages` configuration field or the proper discovery methods (for example by using `find_namespace_packages(...)`/`find_namespace:` instead of `find_packages(...)`/`find:`). You can read more about "package discovery" and "data files" on setuptools documentation page. !! check.warn(importable) /usr/lib/python3.11/site-packages/setuptools/command/build_py.py:153: SetuptoolsDeprecationWarning: Installing 'pythondata_cpu_marocchino.verilog.bench.verilog' as data is deprecated, please list it in `packages`. !! ############################ # Package would be ignored # ############################ Python recognizes 'pythondata_cpu_marocchino.verilog.bench.verilog' as an importable package, but it is not listed in the `packages` configuration of setuptools. 'pythondata_cpu_marocchino.verilog.bench.verilog' has been automatically added to the distribution only because it may contain data files, but this behavior is likely to change in future versions of setuptools (and therefore is considered deprecated). Please make sure that 'pythondata_cpu_marocchino.verilog.bench.verilog' is included as a package by using the `packages` configuration field or the proper discovery methods (for example by using `find_namespace_packages(...)`/`find_namespace:` instead of `find_packages(...)`/`find:`). You can read more about "package discovery" and "data files" on setuptools documentation page. !! check.warn(importable) /usr/lib/python3.11/site-packages/setuptools/command/build_py.py:153: SetuptoolsDeprecationWarning: Installing 'pythondata_cpu_marocchino.verilog.doc.readme' as data is deprecated, please list it in `packages`. !! ############################ # Package would be ignored # ############################ Python recognizes 'pythondata_cpu_marocchino.verilog.doc.readme' as an importable package, but it is not listed in the `packages` configuration of setuptools. 'pythondata_cpu_marocchino.verilog.doc.readme' has been automatically added to the distribution only because it may contain data files, but this behavior is likely to change in future versions of setuptools (and therefore is considered deprecated). Please make sure that 'pythondata_cpu_marocchino.verilog.doc.readme' is included as a package by using the `packages` configuration field or the proper discovery methods (for example by using `find_namespace_packages(...)`/`find_namespace:` instead of `find_packages(...)`/`find:`). You can read more about "package discovery" and "data files" on setuptools documentation page. !! check.warn(importable) /usr/lib/python3.11/site-packages/setuptools/command/build_py.py:153: SetuptoolsDeprecationWarning: Installing 'pythondata_cpu_marocchino.verilog.rtl.verilog' as data is deprecated, please list it in `packages`. !! ############################ # Package would be ignored # ############################ Python recognizes 'pythondata_cpu_marocchino.verilog.rtl.verilog' as an importable package, but it is not listed in the `packages` configuration of setuptools. 'pythondata_cpu_marocchino.verilog.rtl.verilog' has been automatically added to the distribution only because it may contain data files, but this behavior is likely to change in future versions of setuptools (and therefore is considered deprecated). Please make sure that 'pythondata_cpu_marocchino.verilog.rtl.verilog' is included as a package by using the `packages` configuration field or the proper discovery methods (for example by using `find_namespace_packages(...)`/`find_namespace:` instead of `find_packages(...)`/`find:`). You can read more about "package discovery" and "data files" on setuptools documentation page. !! check.warn(importable) creating build/lib/pythondata_cpu_marocchino/verilog copying pythondata_cpu_marocchino/verilog/.travis.yml -> build/lib/pythondata_cpu_marocchino/verilog copying pythondata_cpu_marocchino/verilog/Jenkinsfile -> build/lib/pythondata_cpu_marocchino/verilog copying pythondata_cpu_marocchino/verilog/LICENSE -> build/lib/pythondata_cpu_marocchino/verilog copying pythondata_cpu_marocchino/verilog/README.md -> build/lib/pythondata_cpu_marocchino/verilog copying pythondata_cpu_marocchino/verilog/or1k_marocchino.core -> build/lib/pythondata_cpu_marocchino/verilog creating build/lib/pythondata_cpu_marocchino/verilog/.travis copying pythondata_cpu_marocchino/verilog/.travis/run-or1k-tests.sh -> build/lib/pythondata_cpu_marocchino/verilog/.travis /usr/lib/python3.11/site-packages/setuptools/command/build_py.py:153: SetuptoolsDeprecationWarning: Installing 'pythondata_cpu_marocchino.verilog.rtl.verilog.pfpu_marocchino' as data is deprecated, please list it in `packages`. !! ############################ # Package would be ignored # ############################ Python recognizes 'pythondata_cpu_marocchino.verilog.rtl.verilog.pfpu_marocchino' as an importable package, but it is not listed in the `packages` configuration of setuptools. 'pythondata_cpu_marocchino.verilog.rtl.verilog.pfpu_marocchino' has been automatically added to the distribution only because it may contain data files, but this behavior is likely to change in future versions of setuptools (and therefore is considered deprecated). Please make sure that 'pythondata_cpu_marocchino.verilog.rtl.verilog.pfpu_marocchino' is included as a package by using the `packages` configuration field or the proper discovery methods (for example by using `find_namespace_packages(...)`/`find_namespace:` instead of `find_packages(...)`/`find:`). You can read more about "package discovery" and "data files" on setuptools documentation page. !! check.warn(importable) copying pythondata_cpu_marocchino/verilog/.travis/run-verilator.sh -> build/lib/pythondata_cpu_marocchino/verilog/.travis copying pythondata_cpu_marocchino/verilog/.travis/test.sh -> build/lib/pythondata_cpu_marocchino/verilog/.travis creating build/lib/pythondata_cpu_marocchino/verilog/bench creating build/lib/pythondata_cpu_marocchino/verilog/bench/verilog copying pythondata_cpu_marocchino/verilog/bench/verilog/or1k_marocchino_monitor.v -> build/lib/pythondata_cpu_marocchino/verilog/bench/verilog copying pythondata_cpu_marocchino/verilog/bench/verilog/or1k_marocchino_traceport_monitor.v -> build/lib/pythondata_cpu_marocchino/verilog/bench/verilog creating build/lib/pythondata_cpu_marocchino/verilog/doc creating build/lib/pythondata_cpu_marocchino/verilog/doc/readme copying pythondata_cpu_marocchino/verilog/doc/readme/fp_comparisons_table.odt -> build/lib/pythondata_cpu_marocchino/verilog/doc/readme copying pythondata_cpu_marocchino/verilog/doc/readme/marrochino_1_goal.txt -> build/lib/pythondata_cpu_marocchino/verilog/doc/readme copying pythondata_cpu_marocchino/verilog/doc/readme/marrochino_2_status.txt -> build/lib/pythondata_cpu_marocchino/verilog/doc/readme copying pythondata_cpu_marocchino/verilog/doc/readme/marrochino_3_how_to.txt -> build/lib/pythondata_cpu_marocchino/verilog/doc/readme creating build/lib/pythondata_cpu_marocchino/verilog/rtl creating build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_cfgrs.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_defines.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_dpram_en_w1st.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_bus_if_wb32.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_cache_lru.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_cpu.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_ctrl.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_dcache.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_decode.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_dmmu.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_fetch.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_icache.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_immu.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_int_1clk.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_int_div.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_int_mul.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_lsu.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_ocb.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_oman.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_pic.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_rat_cell.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_rf.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_rsrvs.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_ticktimer.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_top.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_spram_en_w1st.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_sprs.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_utils.vh -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog creating build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino copying pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_addsub.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino copying pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_cmp.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino copying pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_div.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino copying pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_f2i.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino copying pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_i2f.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino copying pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_mul.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino copying pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_muldiv.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino copying pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_rnd.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino copying pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_top.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino + RPM_EC=0 ++ jobs -p + exit 0 Executing(%install): /bin/sh -e /var/tmp/rpm-tmp.pScUtg + umask 022 + cd /builddir/build/BUILD + '[' /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64 '!=' / ']' + rm -rf /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64 ++ dirname /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64 + mkdir -p /builddir/build/BUILDROOT + mkdir /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64 + CFLAGS='-O2 -flto=auto -ffat-lto-objects -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection' + export CFLAGS + CXXFLAGS='-O2 -flto=auto -ffat-lto-objects -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection' + export CXXFLAGS + FFLAGS='-O2 -flto=auto -ffat-lto-objects -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -I/usr/lib64/gfortran/modules' + export FFLAGS + FCFLAGS='-O2 -flto=auto -ffat-lto-objects -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection -I/usr/lib64/gfortran/modules' + export FCFLAGS + LDFLAGS='-Wl,-z,relro -Wl,--as-needed -Wl,-z,now -specs=/usr/lib/rpm/redhat/redhat-hardened-ld -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -Wl,--build-id=sha1 -specs=/usr/lib/rpm/redhat/redhat-package-notes' + export LDFLAGS + LT_SYS_LIBRARY_PATH=/usr/lib64: + export LT_SYS_LIBRARY_PATH + CC=gcc + export CC + CXX=g++ + export CXX + cd litex-pythondata-cpu-marocchino + CFLAGS='-O2 -flto=auto -ffat-lto-objects -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -mbranch-protection=standard -fasynchronous-unwind-tables -fstack-clash-protection' + LDFLAGS='-Wl,-z,relro -Wl,--as-needed -Wl,-z,now -specs=/usr/lib/rpm/redhat/redhat-hardened-ld -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -Wl,--build-id=sha1 -specs=/usr/lib/rpm/redhat/redhat-package-notes' + /usr/bin/python3 setup.py install -O1 --skip-build --root /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64 --prefix /usr running install /usr/lib/python3.11/site-packages/setuptools/command/install.py:34: SetuptoolsDeprecationWarning: setup.py install is deprecated. Use build and pip and other standards-based tools. warnings.warn( running install_lib creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11 creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_top.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_rnd.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_muldiv.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_mul.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_i2f.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_f2i.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_div.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_cmp.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_addsub.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_utils.vh -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_sprs.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_spram_en_w1st.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_top.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_ticktimer.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_rsrvs.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_rf.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_rat_cell.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_pic.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_oman.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_ocb.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_lsu.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_int_mul.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_int_div.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_int_1clk.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_immu.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_icache.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_fetch.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_dmmu.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_decode.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_dcache.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_ctrl.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_cpu.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_cache_lru.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_bus_if_wb32.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_dpram_en_w1st.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_defines.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_cfgrs.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/doc creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/doc/readme copying build/lib/pythondata_cpu_marocchino/verilog/doc/readme/marrochino_3_how_to.txt -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/doc/readme copying build/lib/pythondata_cpu_marocchino/verilog/doc/readme/marrochino_2_status.txt -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/doc/readme copying build/lib/pythondata_cpu_marocchino/verilog/doc/readme/marrochino_1_goal.txt -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/doc/readme copying build/lib/pythondata_cpu_marocchino/verilog/doc/readme/fp_comparisons_table.odt -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/doc/readme creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/bench creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/bench/verilog copying build/lib/pythondata_cpu_marocchino/verilog/bench/verilog/or1k_marocchino_traceport_monitor.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/bench/verilog copying build/lib/pythondata_cpu_marocchino/verilog/bench/verilog/or1k_marocchino_monitor.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/bench/verilog creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/.travis copying build/lib/pythondata_cpu_marocchino/verilog/.travis/test.sh -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/.travis copying build/lib/pythondata_cpu_marocchino/verilog/.travis/run-verilator.sh -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/.travis copying build/lib/pythondata_cpu_marocchino/verilog/.travis/run-or1k-tests.sh -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog/.travis copying build/lib/pythondata_cpu_marocchino/verilog/or1k_marocchino.core -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog copying build/lib/pythondata_cpu_marocchino/verilog/README.md -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog copying build/lib/pythondata_cpu_marocchino/verilog/LICENSE -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog copying build/lib/pythondata_cpu_marocchino/verilog/Jenkinsfile -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog copying build/lib/pythondata_cpu_marocchino/verilog/.travis.yml -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/verilog copying build/lib/pythondata_cpu_marocchino/__init__.py -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino byte-compiling /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino/__init__.py to __init__.cpython-311.pyc writing byte-compilation script '/tmp/tmp_y5ehfib.py' /usr/bin/python3 /tmp/tmp_y5ehfib.py removing /tmp/tmp_y5ehfib.py running install_egg_info running egg_info writing pythondata_cpu_marocchino.egg-info/PKG-INFO writing dependency_links to pythondata_cpu_marocchino.egg-info/dependency_links.txt writing top-level names to pythondata_cpu_marocchino.egg-info/top_level.txt reading manifest file 'pythondata_cpu_marocchino.egg-info/SOURCES.txt' reading manifest template 'MANIFEST.in' warning: no previously-included files matching '*.py[cod]' found anywhere in distribution adding license file 'LICENSE' writing manifest file 'pythondata_cpu_marocchino.egg-info/SOURCES.txt' Copying pythondata_cpu_marocchino.egg-info to /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11/site-packages/pythondata_cpu_marocchino-0.0.post209-py3.11.egg-info running install_scripts + rm -rfv /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/bin/__pycache__ + /usr/bin/find-debuginfo -j4 --strict-build-id -m -i --build-id-seed 2022.08-20220530.3.gitae64a188.fc37 --unique-debug-suffix -2022.08-20220530.3.gitae64a188.fc37.aarch64 --unique-debug-src-base litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64 --run-dwz --dwz-low-mem-die-limit 10000000 --dwz-max-die-limit 50000000 -S debugsourcefiles.list /builddir/build/BUILD/litex-pythondata-cpu-marocchino find: 'debug': No such file or directory + /usr/lib/rpm/check-buildroot + /usr/lib/rpm/redhat/brp-ldconfig + /usr/lib/rpm/brp-compress + /usr/lib/rpm/redhat/brp-strip-lto /usr/bin/strip + /usr/lib/rpm/brp-strip-static-archive /usr/bin/strip + /usr/lib/rpm/check-rpaths + /usr/lib/rpm/redhat/brp-mangle-shebangs + /usr/lib/rpm/brp-remove-la-files + /usr/lib/rpm/redhat/brp-python-bytecompile '' 1 0 Bytecompiling .py files below /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/lib/python3.11 using python3.11 + /usr/lib/rpm/redhat/brp-python-hardlink Processing files: litex-pythondata-cpu-marocchino-python3-2022.08-20220530.3.gitae64a188.fc37.noarch Executing(%doc): /bin/sh -e /var/tmp/rpm-tmp.WvTcjV + umask 022 + cd /builddir/build/BUILD + cd litex-pythondata-cpu-marocchino + DOCDIR=/builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/share/doc/litex-pythondata-cpu-marocchino-python3 + export LC_ALL=C + LC_ALL=C + export DOCDIR + /usr/bin/mkdir -p /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/share/doc/litex-pythondata-cpu-marocchino-python3 + cp -pr README.md /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/share/doc/litex-pythondata-cpu-marocchino-python3 + RPM_EC=0 ++ jobs -p + exit 0 Executing(%license): /bin/sh -e /var/tmp/rpm-tmp.plk2Zy + umask 022 + cd /builddir/build/BUILD + cd litex-pythondata-cpu-marocchino + LICENSEDIR=/builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/share/licenses/litex-pythondata-cpu-marocchino-python3 + export LC_ALL=C + LC_ALL=C + export LICENSEDIR + /usr/bin/mkdir -p /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/share/licenses/litex-pythondata-cpu-marocchino-python3 + cp -pr LICENSE /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64/usr/share/licenses/litex-pythondata-cpu-marocchino-python3 + RPM_EC=0 ++ jobs -p + exit 0 Provides: litex-pythondata-cpu-marocchino-python3 = 2022.08-20220530.3.gitae64a188.fc37 python3.11dist(pythondata-cpu-marocchino) = 0^post209 python3dist(pythondata-cpu-marocchino) = 0^post209 pythondata-cpu-marocchino Requires(rpmlib): rpmlib(CompressedFileNames) <= 3.0.4-1 rpmlib(FileDigests) <= 4.6.0-1 rpmlib(PartialHardlinkSets) <= 4.0.4-1 rpmlib(PayloadFilesHavePrefix) <= 4.0-1 Requires: python(abi) = 3.11 Checking for unpackaged file(s): /usr/lib/rpm/check-files /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64 Wrote: /builddir/build/RPMS/litex-pythondata-cpu-marocchino-python3-2022.08-20220530.3.gitae64a188.fc37.noarch.rpm Executing(%clean): /bin/sh -e /var/tmp/rpm-tmp.wz9ZMT + umask 022 + cd /builddir/build/BUILD + cd litex-pythondata-cpu-marocchino + /usr/bin/rm -rf /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc37.aarch64 + RPM_EC=0 ++ jobs -p + exit 0 Executing(rmbuild): /bin/sh -e /var/tmp/rpm-tmp.omfRb0 + umask 022 + cd /builddir/build/BUILD + rm -rf litex-pythondata-cpu-marocchino litex-pythondata-cpu-marocchino.gemspec + RPM_EC=0 ++ jobs -p + exit 0 Child return code was: 0