Mock Version: 4.1
ENTER ['do_with_status'](['bash', '--login', '-c', '/usr/bin/rpmbuild -bs  --target x86_64 --nodeps /builddir/build/SPECS/litex-pythondata-cpu-marocchino.spec'], chrootPath='/var/lib/mock/fedora-rawhide-x86_64-1688732027.302753/root'env={'TERM': 'vt100', 'SHELL': '/bin/bash', 'HOME': '/builddir', 'HOSTNAME': 'mock', 'PATH': '/usr/bin:/bin:/usr/sbin:/sbin', 'PROMPT_COMMAND': 'printf "\\033]0;<mock-chroot>\\007"', 'PS1': '<mock-chroot> \\s-\\v\\$ ', 'LANG': 'C.UTF-8'}shell=Falselogger=<mockbuild.trace_decorator.getLog object at 0x7f20974cf0d0>timeout=0uid=1000gid=135user='mockbuild'nspawn_args=['--capability=cap_ipc_lock', '--rlimit=RLIMIT_NOFILE=10240', '--capability=cap_ipc_lock', '--bind=/tmp/mock-resolv.x_40qlqw:/etc/resolv.conf', '--bind=/dev/btrfs-control', '--bind=/dev/mapper/control', '--bind=/dev/loop-control', '--bind=/dev/loop0', '--bind=/dev/loop1', '--bind=/dev/loop2', '--bind=/dev/loop3', '--bind=/dev/loop4', '--bind=/dev/loop5', '--bind=/dev/loop6', '--bind=/dev/loop7', '--bind=/dev/loop8', '--bind=/dev/loop9', '--bind=/dev/loop10', '--bind=/dev/loop11']unshare_net=FalseprintOutput=True)
Using nspawn with args ['--capability=cap_ipc_lock', '--rlimit=RLIMIT_NOFILE=10240', '--capability=cap_ipc_lock', '--bind=/tmp/mock-resolv.x_40qlqw:/etc/resolv.conf', '--bind=/dev/btrfs-control', '--bind=/dev/mapper/control', '--bind=/dev/loop-control', '--bind=/dev/loop0', '--bind=/dev/loop1', '--bind=/dev/loop2', '--bind=/dev/loop3', '--bind=/dev/loop4', '--bind=/dev/loop5', '--bind=/dev/loop6', '--bind=/dev/loop7', '--bind=/dev/loop8', '--bind=/dev/loop9', '--bind=/dev/loop10', '--bind=/dev/loop11']
Executing command: ['/usr/bin/systemd-nspawn', '-q', '-M', '73375522a7714148a4c250def4c1d4be', '-D', '/var/lib/mock/fedora-rawhide-x86_64-1688732027.302753/root', '-a', '-u', 'mockbuild', '--capability=cap_ipc_lock', '--rlimit=RLIMIT_NOFILE=10240', '--capability=cap_ipc_lock', '--bind=/tmp/mock-resolv.x_40qlqw:/etc/resolv.conf', '--bind=/dev/btrfs-control', '--bind=/dev/mapper/control', '--bind=/dev/loop-control', '--bind=/dev/loop0', '--bind=/dev/loop1', '--bind=/dev/loop2', '--bind=/dev/loop3', '--bind=/dev/loop4', '--bind=/dev/loop5', '--bind=/dev/loop6', '--bind=/dev/loop7', '--bind=/dev/loop8', '--bind=/dev/loop9', '--bind=/dev/loop10', '--bind=/dev/loop11', '--console=pipe', '--setenv=TERM=vt100', '--setenv=SHELL=/bin/bash', '--setenv=HOME=/builddir', '--setenv=HOSTNAME=mock', '--setenv=PATH=/usr/bin:/bin:/usr/sbin:/sbin', '--setenv=PROMPT_COMMAND=printf "\\033]0;<mock-chroot>\\007"', '--setenv=PS1=<mock-chroot> \\s-\\v\\$ ', '--setenv=LANG=C.UTF-8', '--resolv-conf=off', 'bash', '--login', '-c', '/usr/bin/rpmbuild -bs  --target x86_64 --nodeps /builddir/build/SPECS/litex-pythondata-cpu-marocchino.spec'] with env {'TERM': 'vt100', 'SHELL': '/bin/bash', 'HOME': '/builddir', 'HOSTNAME': 'mock', 'PATH': '/usr/bin:/bin:/usr/sbin:/sbin', 'PROMPT_COMMAND': 'printf "\\033]0;<mock-chroot>\\007"', 'PS1': '<mock-chroot> \\s-\\v\\$ ', 'LANG': 'C.UTF-8', 'SYSTEMD_NSPAWN_TMPFS_TMP': '0', 'SYSTEMD_SECCOMP': '0'} and shell False
Building target platforms: x86_64
Building for target x86_64
setting SOURCE_DATE_EPOCH=1642896000
Wrote: /builddir/build/SRPMS/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.src.rpm
Child return code was: 0
ENTER ['do_with_status'](['bash', '--login', '-c', '/usr/bin/rpmbuild -bb  --target x86_64 --nodeps /builddir/build/SPECS/litex-pythondata-cpu-marocchino.spec'], chrootPath='/var/lib/mock/fedora-rawhide-x86_64-1688732027.302753/root'env={'TERM': 'vt100', 'SHELL': '/bin/bash', 'HOME': '/builddir', 'HOSTNAME': 'mock', 'PATH': '/usr/bin:/bin:/usr/sbin:/sbin', 'PROMPT_COMMAND': 'printf "\\033]0;<mock-chroot>\\007"', 'PS1': '<mock-chroot> \\s-\\v\\$ ', 'LANG': 'C.UTF-8'}shell=Falselogger=<mockbuild.trace_decorator.getLog object at 0x7f20974cf0d0>timeout=0uid=1000gid=135user='mockbuild'nspawn_args=['--capability=cap_ipc_lock', '--rlimit=RLIMIT_NOFILE=10240', '--capability=cap_ipc_lock', '--bind=/tmp/mock-resolv.x_40qlqw:/etc/resolv.conf', '--bind=/dev/btrfs-control', '--bind=/dev/mapper/control', '--bind=/dev/loop-control', '--bind=/dev/loop0', '--bind=/dev/loop1', '--bind=/dev/loop2', '--bind=/dev/loop3', '--bind=/dev/loop4', '--bind=/dev/loop5', '--bind=/dev/loop6', '--bind=/dev/loop7', '--bind=/dev/loop8', '--bind=/dev/loop9', '--bind=/dev/loop10', '--bind=/dev/loop11']unshare_net=FalseprintOutput=True)
Using nspawn with args ['--capability=cap_ipc_lock', '--rlimit=RLIMIT_NOFILE=10240', '--capability=cap_ipc_lock', '--bind=/tmp/mock-resolv.x_40qlqw:/etc/resolv.conf', '--bind=/dev/btrfs-control', '--bind=/dev/mapper/control', '--bind=/dev/loop-control', '--bind=/dev/loop0', '--bind=/dev/loop1', '--bind=/dev/loop2', '--bind=/dev/loop3', '--bind=/dev/loop4', '--bind=/dev/loop5', '--bind=/dev/loop6', '--bind=/dev/loop7', '--bind=/dev/loop8', '--bind=/dev/loop9', '--bind=/dev/loop10', '--bind=/dev/loop11']
Executing command: ['/usr/bin/systemd-nspawn', '-q', '-M', 'dd0a556821ab4e139a5dbc5ef3986ec9', '-D', '/var/lib/mock/fedora-rawhide-x86_64-1688732027.302753/root', '-a', '-u', 'mockbuild', '--capability=cap_ipc_lock', '--rlimit=RLIMIT_NOFILE=10240', '--capability=cap_ipc_lock', '--bind=/tmp/mock-resolv.x_40qlqw:/etc/resolv.conf', '--bind=/dev/btrfs-control', '--bind=/dev/mapper/control', '--bind=/dev/loop-control', '--bind=/dev/loop0', '--bind=/dev/loop1', '--bind=/dev/loop2', '--bind=/dev/loop3', '--bind=/dev/loop4', '--bind=/dev/loop5', '--bind=/dev/loop6', '--bind=/dev/loop7', '--bind=/dev/loop8', '--bind=/dev/loop9', '--bind=/dev/loop10', '--bind=/dev/loop11', '--console=pipe', '--setenv=TERM=vt100', '--setenv=SHELL=/bin/bash', '--setenv=HOME=/builddir', '--setenv=HOSTNAME=mock', '--setenv=PATH=/usr/bin:/bin:/usr/sbin:/sbin', '--setenv=PROMPT_COMMAND=printf "\\033]0;<mock-chroot>\\007"', '--setenv=PS1=<mock-chroot> \\s-\\v\\$ ', '--setenv=LANG=C.UTF-8', '--resolv-conf=off', 'bash', '--login', '-c', '/usr/bin/rpmbuild -bb  --target x86_64 --nodeps /builddir/build/SPECS/litex-pythondata-cpu-marocchino.spec'] with env {'TERM': 'vt100', 'SHELL': '/bin/bash', 'HOME': '/builddir', 'HOSTNAME': 'mock', 'PATH': '/usr/bin:/bin:/usr/sbin:/sbin', 'PROMPT_COMMAND': 'printf "\\033]0;<mock-chroot>\\007"', 'PS1': '<mock-chroot> \\s-\\v\\$ ', 'LANG': 'C.UTF-8', 'SYSTEMD_NSPAWN_TMPFS_TMP': '0', 'SYSTEMD_SECCOMP': '0'} and shell False
Building target platforms: x86_64
Building for target x86_64
setting SOURCE_DATE_EPOCH=1642896000
Executing(%prep): /bin/sh -e /var/tmp/rpm-tmp.8xAEcJ
+ umask 022
+ cd /builddir/build/BUILD
+ cd /builddir/build/BUILD
+ rm -rf litex-pythondata-cpu-marocchino
+ /usr/bin/mkdir -p litex-pythondata-cpu-marocchino
+ cd litex-pythondata-cpu-marocchino
+ /usr/bin/mkdir -p SPECPARTS
+ /usr/bin/chmod -Rf a+rX,u+w,g-w,o-w .
+ find /builddir/build/BUILD -name SPECPARTS -exec rm -rf '{}' +
+ git clone --depth 1 -n -b master https://github.com/litex-hub/pythondata-cpu-marocchino.git .
Cloning into '.'...
+ git fetch --depth 1 origin ae64a18899f40607569833c8ad415c768d7fb3dc
From https://github.com/litex-hub/pythondata-cpu-marocchino
 * branch            ae64a18899f40607569833c8ad415c768d7fb3dc -> FETCH_HEAD
+ git reset --hard ae64a18899f40607569833c8ad415c768d7fb3dc
HEAD is now at ae64a18 Updating pythondata-cpu-marocchino to 0.0.post209
+ git log --format=fuller
commit ae64a18899f40607569833c8ad415c768d7fb3dc
Author:     LiteX Robot <robot@timvideos.us>
AuthorDate: Mon May 30 19:56:17 2022 +0000
Commit:     LiteX Robot <robot@timvideos.us>
CommitDate: Mon May 30 19:56:17 2022 +0000
    Updating pythondata-cpu-marocchino to 0.0.post209
    
    Updated data to v0.0-67-g6e010fd based on 6e010fd5b1da54632939052e7007c9c412aae6bb from https://github.com/openrisc/or1k_marocchino.git.
    > commit 6e010fd5b1da54632939052e7007c9c412aae6bb
    > Author: Andrey Bacherov <bandvig@mail.ru>
    > Date:   Wed Feb 9 10:52:12 2022 +0300
    >
    >     Final fix I(D)MMUs super-cache miss detection. Plus some re-factoring.
    >
    
    Updated using 0.0.post142 from https://github.com/litex-hub/litex-data-auto
+ RPM_EC=0
++ jobs -p
+ exit 0
Executing(%build): /bin/sh -e /var/tmp/rpm-tmp.R6Pm90
+ umask 022
+ cd /builddir/build/BUILD
+ CFLAGS='-O2 -flto=auto -ffat-lto-objects -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-U_FORTIFY_SOURCE,-D_FORTIFY_SOURCE=3 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1  -m64   -mtune=generic -fasynchronous-unwind-tables -fstack-clash-protection -fcf-protection -fno-omit-frame-pointer -mno-omit-leaf-frame-pointer '
+ export CFLAGS
+ CXXFLAGS='-O2 -flto=auto -ffat-lto-objects -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-U_FORTIFY_SOURCE,-D_FORTIFY_SOURCE=3 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1  -m64   -mtune=generic -fasynchronous-unwind-tables -fstack-clash-protection -fcf-protection -fno-omit-frame-pointer -mno-omit-leaf-frame-pointer '
+ export CXXFLAGS
+ FFLAGS='-O2 -flto=auto -ffat-lto-objects -fexceptions -g -grecord-gcc-switches -pipe -Wall -Wp,-U_FORTIFY_SOURCE,-D_FORTIFY_SOURCE=3 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1  -m64   -mtune=generic -fasynchronous-unwind-tables -fstack-clash-protection -fcf-protection -fno-omit-frame-pointer -mno-omit-leaf-frame-pointer -I/usr/lib64/gfortran/modules '
+ export FFLAGS
+ FCFLAGS='-O2 -flto=auto -ffat-lto-objects -fexceptions -g -grecord-gcc-switches -pipe -Wall -Wp,-U_FORTIFY_SOURCE,-D_FORTIFY_SOURCE=3 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1  -m64   -mtune=generic -fasynchronous-unwind-tables -fstack-clash-protection -fcf-protection -fno-omit-frame-pointer -mno-omit-leaf-frame-pointer -I/usr/lib64/gfortran/modules '
+ export FCFLAGS
+ VALAFLAGS=-g
+ export VALAFLAGS
+ RUSTFLAGS='-Copt-level=3 -Cdebuginfo=2 -Ccodegen-units=1 -Cforce-frame-pointers=yes -Clink-arg=-Wl,-z,relro -Clink-arg=-Wl,-z,now -Clink-arg=-specs=/usr/lib/rpm/redhat/redhat-package-notes --cap-lints=warn'
+ export RUSTFLAGS
+ LDFLAGS='-Wl,-z,relro -Wl,--as-needed  -Wl,-z,now -specs=/usr/lib/rpm/redhat/redhat-hardened-ld -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1  -Wl,--build-id=sha1 -specs=/usr/lib/rpm/redhat/redhat-package-notes '
+ export LDFLAGS
+ LT_SYS_LIBRARY_PATH=/usr/lib64:
+ export LT_SYS_LIBRARY_PATH
+ CC=gcc
+ export CC
+ CXX=g++
+ export CXX
+ cd litex-pythondata-cpu-marocchino
+ CFLAGS='-O2 -flto=auto -ffat-lto-objects -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-U_FORTIFY_SOURCE,-D_FORTIFY_SOURCE=3 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1  -m64   -mtune=generic -fasynchronous-unwind-tables -fstack-clash-protection -fcf-protection -fno-omit-frame-pointer -mno-omit-leaf-frame-pointer '
+ LDFLAGS='-Wl,-z,relro -Wl,--as-needed  -Wl,-z,now -specs=/usr/lib/rpm/redhat/redhat-hardened-ld -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1  -Wl,--build-id=sha1 -specs=/usr/lib/rpm/redhat/redhat-package-notes '
+ /usr/bin/python3 setup.py build '--executable=/usr/bin/python3 -sP'
running build
running build_py
creating build
creating build/lib
creating build/lib/pythondata_cpu_marocchino
copying pythondata_cpu_marocchino/__init__.py -> build/lib/pythondata_cpu_marocchino
running egg_info
creating pythondata_cpu_marocchino.egg-info
writing pythondata_cpu_marocchino.egg-info/PKG-INFO
writing dependency_links to pythondata_cpu_marocchino.egg-info/dependency_links.txt
writing top-level names to pythondata_cpu_marocchino.egg-info/top_level.txt
writing manifest file 'pythondata_cpu_marocchino.egg-info/SOURCES.txt'
reading manifest file 'pythondata_cpu_marocchino.egg-info/SOURCES.txt'
reading manifest template 'MANIFEST.in'
warning: no previously-included files matching '*.py[cod]' found anywhere in distribution
adding license file 'LICENSE'
writing manifest file 'pythondata_cpu_marocchino.egg-info/SOURCES.txt'
/usr/lib/python3.12/site-packages/setuptools/command/build_py.py:201: _Warning: Package 'pythondata_cpu_marocchino.verilog' is absent from the `packages` configuration.
!!
        ********************************************************************************
        ############################
        # Package would be ignored #
        ############################
        Python recognizes 'pythondata_cpu_marocchino.verilog' as an importable package[^1],
        but it is absent from setuptools' `packages` configuration.
        This leads to an ambiguous overall configuration. If you want to distribute this
        package, please make sure that 'pythondata_cpu_marocchino.verilog' is explicitly added
        to the `packages` configuration field.
        Alternatively, you can also rely on setuptools' discovery methods
        (for example by using `find_namespace_packages(...)`/`find_namespace:`
        instead of `find_packages(...)`/`find:`).
        You can read more about "package discovery" on setuptools documentation page:
        - https://setuptools.pypa.io/en/latest/userguide/package_discovery.html
        If you don't want 'pythondata_cpu_marocchino.verilog' to be distributed and are
        already explicitly excluding 'pythondata_cpu_marocchino.verilog' via
        `find_namespace_packages(...)/find_namespace` or `find_packages(...)/find`,
        you can try to use `exclude_package_data`, or `include-package-data=False` in
        combination with a more fine grained `package-data` configuration.
        You can read more about "package data files" on setuptools documentation page:
        - https://setuptools.pypa.io/en/latest/userguide/datafiles.html
        [^1]: For Python, any directory (with suitable naming) can be imported,
              even if it does not contain any `.py` files.
              On the other hand, currently there is no concept of package data
              directory, all directories are treated like packages.
        ********************************************************************************
!!
  check.warn(importable)
/usr/lib/python3.12/site-packages/setuptools/command/build_py.py:201: _Warning: Package 'pythondata_cpu_marocchino.verilog.bench.verilog' is absent from the `packages` configuration.
!!
        ********************************************************************************
        ############################
        # Package would be ignored #
        ############################
        Python recognizes 'pythondata_cpu_marocchino.verilog.bench.verilog' as an importable package[^1],
        but it is absent from setuptools' `packages` configuration.
        This leads to an ambiguous overall configuration. If you want to distribute this
        package, please make sure that 'pythondata_cpu_marocchino.verilog.bench.verilog' is explicitly added
        to the `packages` configuration field.
        Alternatively, you can also rely on setuptools' discovery methods
        (for example by using `find_namespace_packages(...)`/`find_namespace:`
        instead of `find_packages(...)`/`find:`).
        You can read more about "package discovery" on setuptools documentation page:
        - https://setuptools.pypa.io/en/latest/userguide/package_discovery.html
        If you don't want 'pythondata_cpu_marocchino.verilog.bench.verilog' to be distributed and are
        already explicitly excluding 'pythondata_cpu_marocchino.verilog.bench.verilog' via
        `find_namespace_packages(...)/find_namespace` or `find_packages(...)/find`,
        you can try to use `exclude_package_data`, or `include-package-data=False` in
        combination with a more fine grained `package-data` configuration.
        You can read more about "package data files" on setuptools documentation page:
        - https://setuptools.pypa.io/en/latest/userguide/datafiles.html
        [^1]: For Python, any directory (with suitable naming) can be imported,
              even if it does not contain any `.py` files.
              On the other hand, currently there is no concept of package data
              directory, all directories are treated like packages.
        ********************************************************************************
!!
  check.warn(importable)
/usr/lib/python3.12/site-packages/setuptools/command/build_py.py:201: _Warning: Package 'pythondata_cpu_marocchino.verilog.doc.readme' is absent from the `packages` configuration.
!!
        ********************************************************************************
        ############################
        # Package would be ignored #
        ############################
        Python recognizes 'pythondata_cpu_marocchino.verilog.doc.readme' as an importable package[^1],
        but it is absent from setuptools' `packages` configuration.
        This leads to an ambiguous overall configuration. If you want to distribute this
        package, please make sure that 'pythondata_cpu_marocchino.verilog.doc.readme' is explicitly added
        to the `packages` configuration field.
        Alternatively, you can also rely on setuptools' discovery methods
        (for example by using `find_namespace_packages(...)`/`find_namespace:`
        instead of `find_packages(...)`/`find:`).
        You can read more about "package discovery" on setuptools documentation page:
        - https://setuptools.pypa.io/en/latest/userguide/package_discovery.html
        If you don't want 'pythondata_cpu_marocchino.verilog.doc.readme' to be distributed and are
        already explicitly excluding 'pythondata_cpu_marocchino.verilog.doc.readme' via
        `find_namespace_packages(...)/find_namespace` or `find_packages(...)/find`,
        you can try to use `exclude_package_data`, or `include-package-data=False` in
        combination with a more fine grained `package-data` configuration.
        You can read more about "package data files" on setuptools documentation page:
        - https://setuptools.pypa.io/en/latest/userguide/datafiles.html
        [^1]: For Python, any directory (with suitable naming) can be imported,
              even if it does not contain any `.py` files.
              On the other hand, currently there is no concept of package data
              directory, all directories are treated like packages.
        ********************************************************************************
!!
  check.warn(importable)
/usr/lib/python3.12/site-packages/setuptools/command/build_py.py:201: _Warning: Package 'pythondata_cpu_marocchino.verilog.rtl.verilog' is absent from the `packages` configuration.
!!
        ********************************************************************************
        ############################
        # Package would be ignored #
        ############################
        Python recognizes 'pythondata_cpu_marocchino.verilog.rtl.verilog' as an importable package[^1],
        but it is absent from setuptools' `packages` configuration.
        This leads to an ambiguous overall configuration. If you want to distribute this
        package, please make sure that 'pythondata_cpu_marocchino.verilog.rtl.verilog' is explicitly added
        to the `packages` configuration field.
        Alternatively, you can also rely on setuptools' discovery methods
        (for example by using `find_namespace_packages(...)`/`find_namespace:`
        instead of `find_packages(...)`/`find:`).
        You can read more about "package discovery" on setuptools documentation page:
        - https://setuptools.pypa.io/en/latest/userguide/package_discovery.html
        If you don't want 'pythondata_cpu_marocchino.verilog.rtl.verilog' to be distributed and are
        already explicitly excluding 'pythondata_cpu_marocchino.verilog.rtl.verilog' via
        `find_namespace_packages(...)/find_namespace` or `find_packages(...)/find`,
        you can try to use `exclude_package_data`, or `include-package-data=False` in
        combination with a more fine grained `package-data` configuration.
        You can read more about "package data files" on setuptools documentation page:
        - https://setuptools.pypa.io/en/latest/userguide/datafiles.html
        [^1]: For Python, any directory (with suitable naming) can be imported,
              even if it does not contain any `.py` files.
              On the other hand, currently there is no concept of package data
              directory, all directories are treated like packages.
        ********************************************************************************
!!
  check.warn(importable)
/usr/lib/python3.12/site-packages/setuptools/command/build_py.py:201: _Warning: Package 'pythondata_cpu_marocchino.verilog.rtl.verilog.pfpu_marocchino' is absent from the `packages` configuration.
!!
        ********************************************************************************
        ############################
        # Package would be ignored #
        ############################
        Python recognizes 'pythondata_cpu_marocchino.verilog.rtl.verilog.pfpu_marocchino' as an importable package[^1],
        but it is absent from setuptools' `packages` configuration.
        This leads to an ambiguous overall configuration. If you want to distribute this
        package, please make sure that 'pythondata_cpu_marocchino.verilog.rtl.verilog.pfpu_marocchino' is explicitly added
        to the `packages` configuration field.
        Alternatively, you can also rely on setuptools' discovery methods
        (for example by using `find_namespace_packages(...)`/`find_namespace:`
        instead of `find_packages(...)`/`find:`).
        You can read more about "package discovery" on setuptools documentation page:
        - https://setuptools.pypa.io/en/latest/userguide/package_discovery.html
        If you don't want 'pythondata_cpu_marocchino.verilog.rtl.verilog.pfpu_marocchino' to be distributed and are
        already explicitly excluding 'pythondata_cpu_marocchino.verilog.rtl.verilog.pfpu_marocchino' via
        `find_namespace_packages(...)/find_namespace` or `find_packages(...)/find`,
        you can try to use `exclude_package_data`, or `include-package-data=False` in
        combination with a more fine grained `package-data` configuration.
        You can read more about "package data files" on setuptools documentation page:
        - https://setuptools.pypa.io/en/latest/userguide/datafiles.html
        [^1]: For Python, any directory (with suitable naming) can be imported,
              even if it does not contain any `.py` files.
              On the other hand, currently there is no concept of package data
              directory, all directories are treated like packages.
        ********************************************************************************
!!
  check.warn(importable)
creating build/lib/pythondata_cpu_marocchino/verilog
copying pythondata_cpu_marocchino/verilog/.travis.yml -> build/lib/pythondata_cpu_marocchino/verilog
copying pythondata_cpu_marocchino/verilog/Jenkinsfile -> build/lib/pythondata_cpu_marocchino/verilog
copying pythondata_cpu_marocchino/verilog/LICENSE -> build/lib/pythondata_cpu_marocchino/verilog
copying pythondata_cpu_marocchino/verilog/README.md -> build/lib/pythondata_cpu_marocchino/verilog
copying pythondata_cpu_marocchino/verilog/or1k_marocchino.core -> build/lib/pythondata_cpu_marocchino/verilog
creating build/lib/pythondata_cpu_marocchino/verilog/.travis
copying pythondata_cpu_marocchino/verilog/.travis/run-or1k-tests.sh -> build/lib/pythondata_cpu_marocchino/verilog/.travis
copying pythondata_cpu_marocchino/verilog/.travis/run-verilator.sh -> build/lib/pythondata_cpu_marocchino/verilog/.travis
copying pythondata_cpu_marocchino/verilog/.travis/test.sh -> build/lib/pythondata_cpu_marocchino/verilog/.travis
creating build/lib/pythondata_cpu_marocchino/verilog/bench
creating build/lib/pythondata_cpu_marocchino/verilog/bench/verilog
copying pythondata_cpu_marocchino/verilog/bench/verilog/or1k_marocchino_monitor.v -> build/lib/pythondata_cpu_marocchino/verilog/bench/verilog
copying pythondata_cpu_marocchino/verilog/bench/verilog/or1k_marocchino_traceport_monitor.v -> build/lib/pythondata_cpu_marocchino/verilog/bench/verilog
creating build/lib/pythondata_cpu_marocchino/verilog/doc
creating build/lib/pythondata_cpu_marocchino/verilog/doc/readme
copying pythondata_cpu_marocchino/verilog/doc/readme/fp_comparisons_table.odt -> build/lib/pythondata_cpu_marocchino/verilog/doc/readme
copying pythondata_cpu_marocchino/verilog/doc/readme/marrochino_1_goal.txt -> build/lib/pythondata_cpu_marocchino/verilog/doc/readme
copying pythondata_cpu_marocchino/verilog/doc/readme/marrochino_2_status.txt -> build/lib/pythondata_cpu_marocchino/verilog/doc/readme
copying pythondata_cpu_marocchino/verilog/doc/readme/marrochino_3_how_to.txt -> build/lib/pythondata_cpu_marocchino/verilog/doc/readme
creating build/lib/pythondata_cpu_marocchino/verilog/rtl
creating build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_cfgrs.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_defines.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_dpram_en_w1st.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_bus_if_wb32.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_cache_lru.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_cpu.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_ctrl.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_dcache.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_decode.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_dmmu.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_fetch.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_icache.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_immu.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_int_1clk.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_int_div.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_int_mul.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_lsu.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_ocb.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_oman.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_pic.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_rat_cell.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_rf.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_rsrvs.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_ticktimer.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_top.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_spram_en_w1st.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_sprs.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
copying pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_utils.vh -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog
creating build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino
copying pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_addsub.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino
copying pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_cmp.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino
copying pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_div.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino
copying pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_f2i.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino
copying pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_i2f.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino
copying pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_mul.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino
copying pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_muldiv.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino
copying pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_rnd.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino
copying pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_top.v -> build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino
+ RPM_EC=0
++ jobs -p
+ exit 0
Executing(%install): /bin/sh -e /var/tmp/rpm-tmp.Gh44pW
+ umask 022
+ cd /builddir/build/BUILD
+ '[' /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64 '!=' / ']'
+ rm -rf /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64
++ dirname /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64
+ mkdir -p /builddir/build/BUILDROOT
+ mkdir /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64
+ CFLAGS='-O2 -flto=auto -ffat-lto-objects -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-U_FORTIFY_SOURCE,-D_FORTIFY_SOURCE=3 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1  -m64   -mtune=generic -fasynchronous-unwind-tables -fstack-clash-protection -fcf-protection -fno-omit-frame-pointer -mno-omit-leaf-frame-pointer '
+ export CFLAGS
+ CXXFLAGS='-O2 -flto=auto -ffat-lto-objects -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-U_FORTIFY_SOURCE,-D_FORTIFY_SOURCE=3 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1  -m64   -mtune=generic -fasynchronous-unwind-tables -fstack-clash-protection -fcf-protection -fno-omit-frame-pointer -mno-omit-leaf-frame-pointer '
+ export CXXFLAGS
+ FFLAGS='-O2 -flto=auto -ffat-lto-objects -fexceptions -g -grecord-gcc-switches -pipe -Wall -Wp,-U_FORTIFY_SOURCE,-D_FORTIFY_SOURCE=3 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1  -m64   -mtune=generic -fasynchronous-unwind-tables -fstack-clash-protection -fcf-protection -fno-omit-frame-pointer -mno-omit-leaf-frame-pointer -I/usr/lib64/gfortran/modules '
+ export FFLAGS
+ FCFLAGS='-O2 -flto=auto -ffat-lto-objects -fexceptions -g -grecord-gcc-switches -pipe -Wall -Wp,-U_FORTIFY_SOURCE,-D_FORTIFY_SOURCE=3 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1  -m64   -mtune=generic -fasynchronous-unwind-tables -fstack-clash-protection -fcf-protection -fno-omit-frame-pointer -mno-omit-leaf-frame-pointer -I/usr/lib64/gfortran/modules '
+ export FCFLAGS
+ VALAFLAGS=-g
+ export VALAFLAGS
+ RUSTFLAGS='-Copt-level=3 -Cdebuginfo=2 -Ccodegen-units=1 -Cforce-frame-pointers=yes -Clink-arg=-Wl,-z,relro -Clink-arg=-Wl,-z,now -Clink-arg=-specs=/usr/lib/rpm/redhat/redhat-package-notes --cap-lints=warn'
+ export RUSTFLAGS
+ LDFLAGS='-Wl,-z,relro -Wl,--as-needed  -Wl,-z,now -specs=/usr/lib/rpm/redhat/redhat-hardened-ld -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1  -Wl,--build-id=sha1 -specs=/usr/lib/rpm/redhat/redhat-package-notes '
+ export LDFLAGS
+ LT_SYS_LIBRARY_PATH=/usr/lib64:
+ export LT_SYS_LIBRARY_PATH
+ CC=gcc
+ export CC
+ CXX=g++
+ export CXX
+ cd litex-pythondata-cpu-marocchino
+ CFLAGS='-O2 -flto=auto -ffat-lto-objects -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-U_FORTIFY_SOURCE,-D_FORTIFY_SOURCE=3 -Wp,-D_GLIBCXX_ASSERTIONS -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -fstack-protector-strong -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1  -m64   -mtune=generic -fasynchronous-unwind-tables -fstack-clash-protection -fcf-protection -fno-omit-frame-pointer -mno-omit-leaf-frame-pointer '
+ LDFLAGS='-Wl,-z,relro -Wl,--as-needed  -Wl,-z,now -specs=/usr/lib/rpm/redhat/redhat-hardened-ld -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1  -Wl,--build-id=sha1 -specs=/usr/lib/rpm/redhat/redhat-package-notes '
+ /usr/bin/python3 setup.py install -O1 --skip-build --root /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64 --prefix /usr
running install
/usr/lib/python3.12/site-packages/setuptools/_distutils/cmd.py:66: SetuptoolsDeprecationWarning: setup.py install is deprecated.
!!
        ********************************************************************************
        Please avoid running ``setup.py`` directly.
        Instead, use pypa/build, pypa/installer, pypa/build or
        other standards-based tools.
        Follow the current Python packaging guidelines when building
        Python RPM packages.
        See https://blog.ganssle.io/articles/2021/10/setup-py-deprecated.html
        and https://docs.fedoraproject.org/en-US/packaging-guidelines/Python/ for details.
        ********************************************************************************
!!
  self.initialize_options()
running install_lib
creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr
creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib
creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12
creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages
creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino
creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog
creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl
creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_top.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_rnd.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_muldiv.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_mul.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_i2f.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_f2i.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_div.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_cmp.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino/pfpu_marocchino_addsub.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog/pfpu_marocchino
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_utils.vh -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_sprs.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_spram_en_w1st.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_top.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_ticktimer.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_rsrvs.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_rf.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_rat_cell.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_pic.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_oman.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_ocb.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_lsu.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_int_mul.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_int_div.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_int_1clk.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_immu.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_icache.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_fetch.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_dmmu.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_decode.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_dcache.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_ctrl.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_cpu.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_cache_lru.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_marocchino_bus_if_wb32.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_dpram_en_w1st.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_defines.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/rtl/verilog/or1k_cfgrs.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/rtl/verilog
creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/doc
creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/doc/readme
copying build/lib/pythondata_cpu_marocchino/verilog/doc/readme/marrochino_3_how_to.txt -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/doc/readme
copying build/lib/pythondata_cpu_marocchino/verilog/doc/readme/marrochino_2_status.txt -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/doc/readme
copying build/lib/pythondata_cpu_marocchino/verilog/doc/readme/marrochino_1_goal.txt -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/doc/readme
copying build/lib/pythondata_cpu_marocchino/verilog/doc/readme/fp_comparisons_table.odt -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/doc/readme
creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/bench
creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/bench/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/bench/verilog/or1k_marocchino_traceport_monitor.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/bench/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/bench/verilog/or1k_marocchino_monitor.v -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/bench/verilog
creating /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/.travis
copying build/lib/pythondata_cpu_marocchino/verilog/.travis/test.sh -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/.travis
copying build/lib/pythondata_cpu_marocchino/verilog/.travis/run-verilator.sh -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/.travis
copying build/lib/pythondata_cpu_marocchino/verilog/.travis/run-or1k-tests.sh -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog/.travis
copying build/lib/pythondata_cpu_marocchino/verilog/or1k_marocchino.core -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/README.md -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/LICENSE -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/Jenkinsfile -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog
copying build/lib/pythondata_cpu_marocchino/verilog/.travis.yml -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/verilog
copying build/lib/pythondata_cpu_marocchino/__init__.py -> /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino
byte-compiling /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino/__init__.py to __init__.cpython-312.pyc
writing byte-compilation script '/tmp/tmp14lj2g0m.py'
/usr/bin/python3 /tmp/tmp14lj2g0m.py
removing /tmp/tmp14lj2g0m.py
running install_egg_info
running egg_info
writing pythondata_cpu_marocchino.egg-info/PKG-INFO
writing dependency_links to pythondata_cpu_marocchino.egg-info/dependency_links.txt
writing top-level names to pythondata_cpu_marocchino.egg-info/top_level.txt
reading manifest file 'pythondata_cpu_marocchino.egg-info/SOURCES.txt'
reading manifest template 'MANIFEST.in'
warning: no previously-included files matching '*.py[cod]' found anywhere in distribution
adding license file 'LICENSE'
writing manifest file 'pythondata_cpu_marocchino.egg-info/SOURCES.txt'
Copying pythondata_cpu_marocchino.egg-info to /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12/site-packages/pythondata_cpu_marocchino-0.0.post209-py3.12.egg-info
running install_scripts
+ rm -rfv /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/bin/__pycache__
+ /usr/bin/find-debuginfo -j2 --strict-build-id -m -i --build-id-seed 2022.08-20220530.3.gitae64a188.fc39 --unique-debug-suffix -2022.08-20220530.3.gitae64a188.fc39.x86_64 --unique-debug-src-base litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64 --run-dwz --dwz-low-mem-die-limit 10000000 --dwz-max-die-limit 110000000 -S debugsourcefiles.list /builddir/build/BUILD/litex-pythondata-cpu-marocchino
find-debuginfo: starting
Extracting debug info from 0 files
Creating .debug symlinks for symlinks to ELF files
find: 'debug': No such file or directory
find-debuginfo: done
+ /usr/lib/rpm/check-buildroot
+ /usr/lib/rpm/redhat/brp-ldconfig
+ /usr/lib/rpm/brp-compress
+ /usr/lib/rpm/redhat/brp-strip-lto /usr/bin/strip
+ /usr/lib/rpm/brp-strip-static-archive /usr/bin/strip
+ /usr/lib/rpm/check-rpaths
+ /usr/lib/rpm/redhat/brp-mangle-shebangs
+ /usr/lib/rpm/brp-remove-la-files
+ env /usr/lib/rpm/redhat/brp-python-bytecompile '' 1 0 -j2
Bytecompiling .py files below /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/lib/python3.12 using python3.12
+ /usr/lib/rpm/redhat/brp-python-hardlink
Processing files: litex-pythondata-cpu-marocchino-python3-2022.08-20220530.3.gitae64a188.fc39.noarch
Executing(%doc): /bin/sh -e /var/tmp/rpm-tmp.TGca8T
+ umask 022
+ cd /builddir/build/BUILD
+ cd litex-pythondata-cpu-marocchino
+ DOCDIR=/builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/share/doc/litex-pythondata-cpu-marocchino-python3
+ export LC_ALL=C
+ LC_ALL=C
+ export DOCDIR
+ /usr/bin/mkdir -p /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/share/doc/litex-pythondata-cpu-marocchino-python3
+ cp -pr /builddir/build/BUILD/litex-pythondata-cpu-marocchino/README.md /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/share/doc/litex-pythondata-cpu-marocchino-python3
+ RPM_EC=0
++ jobs -p
+ exit 0
Executing(%license): /bin/sh -e /var/tmp/rpm-tmp.aJx4K8
+ umask 022
+ cd /builddir/build/BUILD
+ cd litex-pythondata-cpu-marocchino
+ LICENSEDIR=/builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/share/licenses/litex-pythondata-cpu-marocchino-python3
+ export LC_ALL=C
+ LC_ALL=C
+ export LICENSEDIR
+ /usr/bin/mkdir -p /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/share/licenses/litex-pythondata-cpu-marocchino-python3
+ cp -pr /builddir/build/BUILD/litex-pythondata-cpu-marocchino/LICENSE /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64/usr/share/licenses/litex-pythondata-cpu-marocchino-python3
+ RPM_EC=0
++ jobs -p
+ exit 0
Provides: litex-pythondata-cpu-marocchino-python3 = 2022.08-20220530.3.gitae64a188.fc39 python3.12dist(pythondata-cpu-marocchino) = 0^post209 python3dist(pythondata-cpu-marocchino) = 0^post209 pythondata-cpu-marocchino
Requires(rpmlib): rpmlib(CompressedFileNames) <= 3.0.4-1 rpmlib(FileDigests) <= 4.6.0-1 rpmlib(PartialHardlinkSets) <= 4.0.4-1 rpmlib(PayloadFilesHavePrefix) <= 4.0-1
Requires: python(abi) = 3.12
Checking for unpackaged file(s): /usr/lib/rpm/check-files /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64
Wrote: /builddir/build/RPMS/litex-pythondata-cpu-marocchino-python3-2022.08-20220530.3.gitae64a188.fc39.noarch.rpm
Executing(%clean): /bin/sh -e /var/tmp/rpm-tmp.Z3zCi9
+ umask 022
+ cd /builddir/build/BUILD
+ cd litex-pythondata-cpu-marocchino
+ /usr/bin/rm -rf /builddir/build/BUILDROOT/litex-pythondata-cpu-marocchino-2022.08-20220530.3.gitae64a188.fc39.x86_64
+ RPM_EC=0
++ jobs -p
+ exit 0
Executing(rmbuild): /bin/sh -e /var/tmp/rpm-tmp.J2oaOp
+ umask 022
+ cd /builddir/build/BUILD
+ rm -rf litex-pythondata-cpu-marocchino litex-pythondata-cpu-marocchino.gemspec
+ RPM_EC=0
++ jobs -p
+ exit 0
Child return code was: 0