Fawkes API
Fawkes Development Version
mmx.h
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/***************************************************************************
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* mmx.h - MMX CPU extension support
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*
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* Copyright 1997-2001 H. Dietz and R. Fisher (copied form FFmpeg)
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*
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****************************************************************************/
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/* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Library General Public License for more details.
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*
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* Read the full text in the LICENSE.GPL file in the doc directory.
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*/
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#ifndef _FIREVISION_FVUTILS_CPU_MMX_H_
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#define _FIREVISION_FVUTILS_CPU_MMX_H_
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namespace
firevision {
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/// @cond MMX
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/*
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* The type of an value that fits in an MMX register (note that long
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* long constant values MUST be suffixed by LL and unsigned long long
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* values by ULL, lest they be truncated by the compiler)
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*/
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typedef
union
{
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long
long
q;
/* Quadword (64-bit) value */
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unsigned
long
long
uq;
/* Unsigned Quadword */
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int
d[2];
/* 2 Doubleword (32-bit) values */
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unsigned
int
ud[2];
/* 2 Unsigned Doubleword */
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short
w[4];
/* 4 Word (16-bit) values */
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unsigned
short
uw[4];
/* 4 Unsigned Word */
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char
b[8];
/* 8 Byte (8-bit) values */
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unsigned
char
ub[8];
/* 8 Unsigned Byte */
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float
s[2];
/* Single-precision (32-bit) value */
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} mmx_t;
/* On an 8-byte (64-bit) boundary */
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#define mmx_i2r(op, imm, reg) \
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__asm__ __volatile__(#op " %0, %%" #reg \
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:
/* nothing */
\
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: "i"(imm))
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#define mmx_m2r(op, mem, reg) \
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__asm__ __volatile__(#op " %0, %%" #reg \
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:
/* nothing */
\
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: "m"(mem))
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#define mmx_r2m(op, reg, mem) \
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__asm__ __volatile__(#op " %%" #reg ", %0" : "=m"(mem) :
/* nothing */
)
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#define mmx_r2r(op, regs, regd) __asm__ __volatile__(#op " %" #regs ", %" #regd)
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#define emms() __asm__ __volatile__("emms")
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#define movd_m2r(var, reg) mmx_m2r(movd, var, reg)
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#define movd_r2m(reg, var) mmx_r2m(movd, reg, var)
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#define movd_r2r(regs, regd) mmx_r2r(movd, regs, regd)
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#define movq_m2r(var, reg) mmx_m2r(movq, var, reg)
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#define movq_r2m(reg, var) mmx_r2m(movq, reg, var)
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#define movq_r2r(regs, regd) mmx_r2r(movq, regs, regd)
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#define packssdw_m2r(var, reg) mmx_m2r(packssdw, var, reg)
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#define packssdw_r2r(regs, regd) mmx_r2r(packssdw, regs, regd)
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#define packsswb_m2r(var, reg) mmx_m2r(packsswb, var, reg)
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#define packsswb_r2r(regs, regd) mmx_r2r(packsswb, regs, regd)
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#define packuswb_m2r(var, reg) mmx_m2r(packuswb, var, reg)
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#define packuswb_r2r(regs, regd) mmx_r2r(packuswb, regs, regd)
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#define paddb_m2r(var, reg) mmx_m2r(paddb, var, reg)
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#define paddb_r2r(regs, regd) mmx_r2r(paddb, regs, regd)
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#define paddd_m2r(var, reg) mmx_m2r(paddd, var, reg)
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#define paddd_r2r(regs, regd) mmx_r2r(paddd, regs, regd)
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#define paddw_m2r(var, reg) mmx_m2r(paddw, var, reg)
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#define paddw_r2r(regs, regd) mmx_r2r(paddw, regs, regd)
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#define paddsb_m2r(var, reg) mmx_m2r(paddsb, var, reg)
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#define paddsb_r2r(regs, regd) mmx_r2r(paddsb, regs, regd)
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#define paddsw_m2r(var, reg) mmx_m2r(paddsw, var, reg)
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#define paddsw_r2r(regs, regd) mmx_r2r(paddsw, regs, regd)
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#define paddusb_m2r(var, reg) mmx_m2r(paddusb, var, reg)
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#define paddusb_r2r(regs, regd) mmx_r2r(paddusb, regs, regd)
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#define paddusw_m2r(var, reg) mmx_m2r(paddusw, var, reg)
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#define paddusw_r2r(regs, regd) mmx_r2r(paddusw, regs, regd)
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#define pand_m2r(var, reg) mmx_m2r(pand, var, reg)
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#define pand_r2r(regs, regd) mmx_r2r(pand, regs, regd)
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#define pandn_m2r(var, reg) mmx_m2r(pandn, var, reg)
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#define pandn_r2r(regs, regd) mmx_r2r(pandn, regs, regd)
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#define pcmpeqb_m2r(var, reg) mmx_m2r(pcmpeqb, var, reg)
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#define pcmpeqb_r2r(regs, regd) mmx_r2r(pcmpeqb, regs, regd)
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#define pcmpeqd_m2r(var, reg) mmx_m2r(pcmpeqd, var, reg)
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#define pcmpeqd_r2r(regs, regd) mmx_r2r(pcmpeqd, regs, regd)
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#define pcmpeqw_m2r(var, reg) mmx_m2r(pcmpeqw, var, reg)
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#define pcmpeqw_r2r(regs, regd) mmx_r2r(pcmpeqw, regs, regd)
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#define pcmpgtb_m2r(var, reg) mmx_m2r(pcmpgtb, var, reg)
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#define pcmpgtb_r2r(regs, regd) mmx_r2r(pcmpgtb, regs, regd)
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#define pcmpgtd_m2r(var, reg) mmx_m2r(pcmpgtd, var, reg)
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#define pcmpgtd_r2r(regs, regd) mmx_r2r(pcmpgtd, regs, regd)
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#define pcmpgtw_m2r(var, reg) mmx_m2r(pcmpgtw, var, reg)
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#define pcmpgtw_r2r(regs, regd) mmx_r2r(pcmpgtw, regs, regd)
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#define pmaddwd_m2r(var, reg) mmx_m2r(pmaddwd, var, reg)
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#define pmaddwd_r2r(regs, regd) mmx_r2r(pmaddwd, regs, regd)
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#define pmulhw_m2r(var, reg) mmx_m2r(pmulhw, var, reg)
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#define pmulhw_r2r(regs, regd) mmx_r2r(pmulhw, regs, regd)
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#define pmullw_m2r(var, reg) mmx_m2r(pmullw, var, reg)
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#define pmullw_r2r(regs, regd) mmx_r2r(pmullw, regs, regd)
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#define por_m2r(var, reg) mmx_m2r(por, var, reg)
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#define por_r2r(regs, regd) mmx_r2r(por, regs, regd)
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#define pslld_i2r(imm, reg) mmx_i2r(pslld, imm, reg)
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#define pslld_m2r(var, reg) mmx_m2r(pslld, var, reg)
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#define pslld_r2r(regs, regd) mmx_r2r(pslld, regs, regd)
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#define psllq_i2r(imm, reg) mmx_i2r(psllq, imm, reg)
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#define psllq_m2r(var, reg) mmx_m2r(psllq, var, reg)
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#define psllq_r2r(regs, regd) mmx_r2r(psllq, regs, regd)
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#define psllw_i2r(imm, reg) mmx_i2r(psllw, imm, reg)
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#define psllw_m2r(var, reg) mmx_m2r(psllw, var, reg)
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#define psllw_r2r(regs, regd) mmx_r2r(psllw, regs, regd)
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#define psrad_i2r(imm, reg) mmx_i2r(psrad, imm, reg)
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#define psrad_m2r(var, reg) mmx_m2r(psrad, var, reg)
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#define psrad_r2r(regs, regd) mmx_r2r(psrad, regs, regd)
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#define psraw_i2r(imm, reg) mmx_i2r(psraw, imm, reg)
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#define psraw_m2r(var, reg) mmx_m2r(psraw, var, reg)
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#define psraw_r2r(regs, regd) mmx_r2r(psraw, regs, regd)
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#define psrld_i2r(imm, reg) mmx_i2r(psrld, imm, reg)
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#define psrld_m2r(var, reg) mmx_m2r(psrld, var, reg)
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#define psrld_r2r(regs, regd) mmx_r2r(psrld, regs, regd)
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#define psrlq_i2r(imm, reg) mmx_i2r(psrlq, imm, reg)
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#define psrlq_m2r(var, reg) mmx_m2r(psrlq, var, reg)
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#define psrlq_r2r(regs, regd) mmx_r2r(psrlq, regs, regd)
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#define psrlw_i2r(imm, reg) mmx_i2r(psrlw, imm, reg)
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#define psrlw_m2r(var, reg) mmx_m2r(psrlw, var, reg)
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#define psrlw_r2r(regs, regd) mmx_r2r(psrlw, regs, regd)
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#define psubb_m2r(var, reg) mmx_m2r(psubb, var, reg)
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#define psubb_r2r(regs, regd) mmx_r2r(psubb, regs, regd)
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#define psubd_m2r(var, reg) mmx_m2r(psubd, var, reg)
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#define psubd_r2r(regs, regd) mmx_r2r(psubd, regs, regd)
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#define psubw_m2r(var, reg) mmx_m2r(psubw, var, reg)
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#define psubw_r2r(regs, regd) mmx_r2r(psubw, regs, regd)
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#define psubsb_m2r(var, reg) mmx_m2r(psubsb, var, reg)
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#define psubsb_r2r(regs, regd) mmx_r2r(psubsb, regs, regd)
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#define psubsw_m2r(var, reg) mmx_m2r(psubsw, var, reg)
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#define psubsw_r2r(regs, regd) mmx_r2r(psubsw, regs, regd)
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#define psubusb_m2r(var, reg) mmx_m2r(psubusb, var, reg)
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#define psubusb_r2r(regs, regd) mmx_r2r(psubusb, regs, regd)
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#define psubusw_m2r(var, reg) mmx_m2r(psubusw, var, reg)
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#define psubusw_r2r(regs, regd) mmx_r2r(psubusw, regs, regd)
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#define punpckhbw_m2r(var, reg) mmx_m2r(punpckhbw, var, reg)
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#define punpckhbw_r2r(regs, regd) mmx_r2r(punpckhbw, regs, regd)
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#define punpckhdq_m2r(var, reg) mmx_m2r(punpckhdq, var, reg)
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#define punpckhdq_r2r(regs, regd) mmx_r2r(punpckhdq, regs, regd)
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#define punpckhwd_m2r(var, reg) mmx_m2r(punpckhwd, var, reg)
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#define punpckhwd_r2r(regs, regd) mmx_r2r(punpckhwd, regs, regd)
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#define punpcklbw_m2r(var, reg) mmx_m2r(punpcklbw, var, reg)
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#define punpcklbw_r2r(regs, regd) mmx_r2r(punpcklbw, regs, regd)
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#define punpckldq_m2r(var, reg) mmx_m2r(punpckldq, var, reg)
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#define punpckldq_r2r(regs, regd) mmx_r2r(punpckldq, regs, regd)
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#define punpcklwd_m2r(var, reg) mmx_m2r(punpcklwd, var, reg)
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#define punpcklwd_r2r(regs, regd) mmx_r2r(punpcklwd, regs, regd)
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#define pxor_m2r(var, reg) mmx_m2r(pxor, var, reg)
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#define pxor_r2r(regs, regd) mmx_r2r(pxor, regs, regd)
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/* 3DNOW extensions */
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#define pavgusb_m2r(var, reg) mmx_m2r(pavgusb, var, reg)
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#define pavgusb_r2r(regs, regd) mmx_r2r(pavgusb, regs, regd)
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/* AMD MMX extensions - also available in intel SSE */
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#define mmx_m2ri(op, mem, reg, imm) \
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__asm__ __volatile__(#op " %1, %0, %%" #reg \
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:
/* nothing */
\
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: "m"(mem), "i"(imm))
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#define mmx_r2ri(op, regs, regd, imm) \
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__asm__ __volatile__(#op " %0, %%" #regs ", %%" #regd \
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:
/* nothing */
\
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: "i"(imm))
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#define mmx_fetch(mem, hint) \
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__asm__ __volatile__("prefetch" #hint " %0" \
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:
/* nothing */
\
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: "m"(mem))
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#define maskmovq(regs, maskreg) mmx_r2ri(maskmovq, regs, maskreg)
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#define movntq_r2m(mmreg, var) mmx_r2m(movntq, mmreg, var)
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#define pavgb_m2r(var, reg) mmx_m2r(pavgb, var, reg)
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#define pavgb_r2r(regs, regd) mmx_r2r(pavgb, regs, regd)
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#define pavgw_m2r(var, reg) mmx_m2r(pavgw, var, reg)
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#define pavgw_r2r(regs, regd) mmx_r2r(pavgw, regs, regd)
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#define pextrw_r2r(mmreg, reg, imm) mmx_r2ri(pextrw, mmreg, reg, imm)
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#define pinsrw_r2r(reg, mmreg, imm) mmx_r2ri(pinsrw, reg, mmreg, imm)
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#define pmaxsw_m2r(var, reg) mmx_m2r(pmaxsw, var, reg)
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#define pmaxsw_r2r(regs, regd) mmx_r2r(pmaxsw, regs, regd)
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#define pmaxub_m2r(var, reg) mmx_m2r(pmaxub, var, reg)
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#define pmaxub_r2r(regs, regd) mmx_r2r(pmaxub, regs, regd)
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#define pminsw_m2r(var, reg) mmx_m2r(pminsw, var, reg)
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#define pminsw_r2r(regs, regd) mmx_r2r(pminsw, regs, regd)
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#define pminub_m2r(var, reg) mmx_m2r(pminub, var, reg)
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#define pminub_r2r(regs, regd) mmx_r2r(pminub, regs, regd)
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#define pmovmskb(mmreg, reg) __asm__ __volatile__("movmskps %" #mmreg ", %" #reg)
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#define pmulhuw_m2r(var, reg) mmx_m2r(pmulhuw, var, reg)
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#define pmulhuw_r2r(regs, regd) mmx_r2r(pmulhuw, regs, regd)
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#define prefetcht0(mem) mmx_fetch(mem, t0)
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#define prefetcht1(mem) mmx_fetch(mem, t1)
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#define prefetcht2(mem) mmx_fetch(mem, t2)
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#define prefetchnta(mem) mmx_fetch(mem, nta)
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#define psadbw_m2r(var, reg) mmx_m2r(psadbw, var, reg)
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#define psadbw_r2r(regs, regd) mmx_r2r(psadbw, regs, regd)
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#define pshufw_m2r(var, reg, imm) mmx_m2ri(pshufw, var, reg, imm)
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#define pshufw_r2r(regs, regd, imm) mmx_r2ri(pshufw, regs, regd, imm)
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#define sfence() __asm__ __volatile__("sfence\n\t")
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/* SSE2 */
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#define pshufhw_m2r(var, reg, imm) mmx_m2ri(pshufhw, var, reg, imm)
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#define pshufhw_r2r(regs, regd, imm) mmx_r2ri(pshufhw, regs, regd, imm)
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#define pshuflw_m2r(var, reg, imm) mmx_m2ri(pshuflw, var, reg, imm)
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#define pshuflw_r2r(regs, regd, imm) mmx_r2ri(pshuflw, regs, regd, imm)
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#define pshufd_r2r(regs, regd, imm) mmx_r2ri(pshufd, regs, regd, imm)
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#define movdqa_m2r(var, reg) mmx_m2r(movdqa, var, reg)
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#define movdqa_r2m(reg, var) mmx_r2m(movdqa, reg, var)
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#define movdqa_r2r(regs, regd) mmx_r2r(movdqa, regs, regd)
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#define movdqu_m2r(var, reg) mmx_m2r(movdqu, var, reg)
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#define movdqu_r2m(reg, var) mmx_r2m(movdqu, reg, var)
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#define movdqu_r2r(regs, regd) mmx_r2r(movdqu, regs, regd)
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#define pmullw_r2m(reg, var) mmx_r2m(pmullw, reg, var)
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#define pslldq_i2r(imm, reg) mmx_i2r(pslldq, imm, reg)
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#define psrldq_i2r(imm, reg) mmx_i2r(psrldq, imm, reg)
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#define punpcklqdq_r2r(regs, regd) mmx_r2r(punpcklqdq, regs, regd)
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#define punpckhqdq_r2r(regs, regd) mmx_r2r(punpckhqdq, regs, regd)
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/// @endcond
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}
// end namespace firevision
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#endif
src
libs
fvutils
cpu
mmx.h
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