[
    {
        "ArchStdEvent": "STALL_FRONTEND",
        "Errata": "Errata AC03_CPU_29",
        "BriefDescription": "Impacted by errata, use metrics instead -"
    },
    {
        "ArchStdEvent": "STALL_BACKEND"
    },
    {
        "ArchStdEvent": "STALL",
        "Errata": "Errata AC03_CPU_29",
        "BriefDescription": "Impacted by errata, use metrics instead -"
    },
    {
        "ArchStdEvent": "STALL_SLOT_BACKEND"
    },
    {
        "ArchStdEvent": "STALL_SLOT_FRONTEND",
        "Errata": "Errata AC03_CPU_29",
        "BriefDescription": "Impacted by errata, use metrics instead -"
    },
    {
        "ArchStdEvent": "STALL_SLOT"
    },
    {
        "ArchStdEvent": "STALL_BACKEND_MEM"
    },
    {
        "PublicDescription": "Frontend stall cycles, TLB",
        "EventCode": "0x815c",
        "EventName": "STALL_FRONTEND_TLB",
        "BriefDescription": "Frontend stall cycles, TLB"
    },
    {
        "PublicDescription": "Backend stall cycles, TLB",
        "EventCode": "0x8167",
        "EventName": "STALL_BACKEND_TLB",
        "BriefDescription": "Backend stall cycles, TLB"
    }
]
