DPDK 21.11.0
rte_eventdev.h
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1/* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2016 Cavium, Inc.
3 * Copyright(c) 2016-2018 Intel Corporation.
4 * Copyright 2016 NXP
5 * All rights reserved.
6 */
7
8#ifndef _RTE_EVENTDEV_H_
9#define _RTE_EVENTDEV_H_
10
209#ifdef __cplusplus
210extern "C" {
211#endif
212
213#include <rte_common.h>
214#include <rte_config.h>
215#include <rte_errno.h>
216#include <rte_mbuf_pool_ops.h>
217#include <rte_memory.h>
218#include <rte_mempool.h>
219
221
222struct rte_mbuf; /* we just use mbuf pointers; no need to include rte_mbuf.h */
223struct rte_event;
224
225/* Event device capability bitmap flags */
226#define RTE_EVENT_DEV_CAP_QUEUE_QOS (1ULL << 0)
232#define RTE_EVENT_DEV_CAP_EVENT_QOS (1ULL << 1)
239#define RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED (1ULL << 2)
248#define RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES (1ULL << 3)
255#define RTE_EVENT_DEV_CAP_BURST_MODE (1ULL << 4)
263#define RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE (1ULL << 5)
274#define RTE_EVENT_DEV_CAP_NONSEQ_MODE (1ULL << 6)
284#define RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK (1ULL << 7)
290#define RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT (1ULL << 8)
296#define RTE_EVENT_DEV_CAP_CARRY_FLOW_ID (1ULL << 9)
302#define RTE_EVENT_DEV_CAP_MAINTENANCE_FREE (1ULL << 10)
312/* Event device priority levels */
313#define RTE_EVENT_DEV_PRIORITY_HIGHEST 0
318#define RTE_EVENT_DEV_PRIORITY_NORMAL 128
323#define RTE_EVENT_DEV_PRIORITY_LOWEST 255
336uint8_t
338
349int
350rte_event_dev_get_dev_id(const char *name);
351
362int
364
369 const char *driver_name;
370 struct rte_device *dev;
418};
419
435int
436rte_event_dev_info_get(uint8_t dev_id, struct rte_event_dev_info *dev_info);
437
441#define RTE_EVENT_DEV_ATTR_PORT_COUNT 0
445#define RTE_EVENT_DEV_ATTR_QUEUE_COUNT 1
449#define RTE_EVENT_DEV_ATTR_STARTED 2
450
463int
464rte_event_dev_attr_get(uint8_t dev_id, uint32_t attr_id,
465 uint32_t *attr_value);
466
467
468/* Event device configuration bitmap flags */
469#define RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT (1ULL << 0)
533};
534
554int
556 const struct rte_event_dev_config *dev_conf);
557
558/* Event queue specific APIs */
559
560/* Event queue configuration bitmap flags */
561#define RTE_EVENT_QUEUE_CFG_ALL_TYPES (1ULL << 0)
567#define RTE_EVENT_QUEUE_CFG_SINGLE_LINK (1ULL << 1)
604 uint8_t priority;
612};
613
636int
637rte_event_queue_default_conf_get(uint8_t dev_id, uint8_t queue_id,
638 struct rte_event_queue_conf *queue_conf);
639
658int
659rte_event_queue_setup(uint8_t dev_id, uint8_t queue_id,
660 const struct rte_event_queue_conf *queue_conf);
661
665#define RTE_EVENT_QUEUE_ATTR_PRIORITY 0
669#define RTE_EVENT_QUEUE_ATTR_NB_ATOMIC_FLOWS 1
673#define RTE_EVENT_QUEUE_ATTR_NB_ATOMIC_ORDER_SEQUENCES 2
677#define RTE_EVENT_QUEUE_ATTR_EVENT_QUEUE_CFG 3
681#define RTE_EVENT_QUEUE_ATTR_SCHEDULE_TYPE 4
682
703int
704rte_event_queue_attr_get(uint8_t dev_id, uint8_t queue_id, uint32_t attr_id,
705 uint32_t *attr_value);
706
707/* Event port specific APIs */
708
709/* Event port configuration bitmap flags */
710#define RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL (1ULL << 0)
717#define RTE_EVENT_PORT_CFG_SINGLE_LINK (1ULL << 1)
722#define RTE_EVENT_PORT_CFG_HINT_PRODUCER (1ULL << 2)
732#define RTE_EVENT_PORT_CFG_HINT_CONSUMER (1ULL << 3)
743#define RTE_EVENT_PORT_CFG_HINT_WORKER (1ULL << 4)
782 uint32_t event_port_cfg;
783};
784
807int
808rte_event_port_default_conf_get(uint8_t dev_id, uint8_t port_id,
809 struct rte_event_port_conf *port_conf);
810
831int
832rte_event_port_setup(uint8_t dev_id, uint8_t port_id,
833 const struct rte_event_port_conf *port_conf);
834
838#define RTE_EVENT_PORT_ATTR_ENQ_DEPTH 0
842#define RTE_EVENT_PORT_ATTR_DEQ_DEPTH 1
846#define RTE_EVENT_PORT_ATTR_NEW_EVENT_THRESHOLD 2
850#define RTE_EVENT_PORT_ATTR_IMPLICIT_RELEASE_DISABLE 3
851
868int
869rte_event_port_attr_get(uint8_t dev_id, uint8_t port_id, uint32_t attr_id,
870 uint32_t *attr_value);
871
888int
889rte_event_dev_start(uint8_t dev_id);
890
909void
910rte_event_dev_stop(uint8_t dev_id);
911
912typedef void (*eventdev_stop_flush_t)(uint8_t dev_id, struct rte_event event,
913 void *arg);
942int
944 eventdev_stop_flush_t callback, void *userdata);
945
957int
958rte_event_dev_close(uint8_t dev_id);
959
964 uint16_t nb_elem;
966 uint16_t rsvd : 15;
968 uint16_t attr_valid : 1;
971 union {
972 /* Used by Rx/Tx adapter.
973 * Indicates that all the elements in this vector belong to the
974 * same port and queue pair when originating from Rx adapter,
975 * valid only when event type is ETHDEV_VECTOR or
976 * ETH_RX_ADAPTER_VECTOR.
977 * Can also be used to indicate the Tx adapter the destination
978 * port and queue of the mbufs in the vector
979 */
980 struct {
981 uint16_t port;
982 /* Ethernet device port id. */
983 uint16_t queue;
984 /* Ethernet device queue id. */
985 };
986 };
988 uint64_t impl_opaque;
994 union {
995 struct rte_mbuf *mbufs[0];
996 void *ptrs[0];
997 uint64_t *u64s[0];
998 } __rte_aligned(16);
1003};
1004
1005/* Scheduler type definitions */
1006#define RTE_SCHED_TYPE_ORDERED 0
1033#define RTE_SCHED_TYPE_ATOMIC 1
1052#define RTE_SCHED_TYPE_PARALLEL 2
1065/* Event types to classify the event source */
1066#define RTE_EVENT_TYPE_ETHDEV 0x0
1068#define RTE_EVENT_TYPE_CRYPTODEV 0x1
1070#define RTE_EVENT_TYPE_TIMER 0x2
1072#define RTE_EVENT_TYPE_CPU 0x3
1076#define RTE_EVENT_TYPE_ETH_RX_ADAPTER 0x4
1078#define RTE_EVENT_TYPE_VECTOR 0x8
1090#define RTE_EVENT_TYPE_ETHDEV_VECTOR \
1091 (RTE_EVENT_TYPE_VECTOR | RTE_EVENT_TYPE_ETHDEV)
1093#define RTE_EVENT_TYPE_CPU_VECTOR (RTE_EVENT_TYPE_VECTOR | RTE_EVENT_TYPE_CPU)
1095#define RTE_EVENT_TYPE_ETH_RX_ADAPTER_VECTOR \
1096 (RTE_EVENT_TYPE_VECTOR | RTE_EVENT_TYPE_ETH_RX_ADAPTER)
1099#define RTE_EVENT_TYPE_MAX 0x10
1102/* Event enqueue operations */
1103#define RTE_EVENT_OP_NEW 0
1107#define RTE_EVENT_OP_FORWARD 1
1115#define RTE_EVENT_OP_RELEASE 2
1155 union {
1156 uint64_t event;
1158 struct {
1159 uint32_t flow_id:20;
1166 uint32_t sub_event_type:8;
1170 uint32_t event_type:4;
1174 uint8_t op:2;
1180 uint8_t rsvd:4;
1182 uint8_t sched_type:2;
1187 uint8_t queue_id;
1194 uint8_t priority;
1211 };
1212 };
1214 union {
1215 uint64_t u64;
1223 };
1224};
1225
1226/* Ethdev Rx adapter capability bitmap flags */
1227#define RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT 0x1
1231#define RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ 0x2
1235#define RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID 0x4
1242#define RTE_EVENT_ETH_RX_ADAPTER_CAP_EVENT_VECTOR 0x8
1264int
1265rte_event_eth_rx_adapter_caps_get(uint8_t dev_id, uint16_t eth_port_id,
1266 uint32_t *caps);
1267
1268#define RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT (1ULL << 0)
1271#define RTE_EVENT_TIMER_ADAPTER_CAP_PERIODIC (1ULL << 1)
1287int
1288rte_event_timer_adapter_caps_get(uint8_t dev_id, uint32_t *caps);
1289
1290/* Crypto adapter capability bitmap flag */
1291#define RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_NEW 0x1
1298#define RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_FWD 0x2
1305#define RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_QP_EV_BIND 0x4
1310#define RTE_EVENT_CRYPTO_ADAPTER_CAP_SESSION_PRIVATE_DATA 0x8
1335int
1336rte_event_crypto_adapter_caps_get(uint8_t dev_id, uint8_t cdev_id,
1337 uint32_t *caps);
1338
1339/* Ethdev Tx adapter capability bitmap flags */
1340#define RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT 0x1
1343#define RTE_EVENT_ETH_TX_ADAPTER_CAP_EVENT_VECTOR 0x2
1365int
1366rte_event_eth_tx_adapter_caps_get(uint8_t dev_id, uint16_t eth_port_id,
1367 uint32_t *caps);
1368
1394int
1395rte_event_dequeue_timeout_ticks(uint8_t dev_id, uint64_t ns,
1396 uint64_t *timeout_ticks);
1397
1458int
1459rte_event_port_link(uint8_t dev_id, uint8_t port_id,
1460 const uint8_t queues[], const uint8_t priorities[],
1461 uint16_t nb_links);
1462
1502int
1503rte_event_port_unlink(uint8_t dev_id, uint8_t port_id,
1504 uint8_t queues[], uint16_t nb_unlinks);
1505
1527int
1528rte_event_port_unlinks_in_progress(uint8_t dev_id, uint8_t port_id);
1529
1557int
1558rte_event_port_links_get(uint8_t dev_id, uint8_t port_id,
1559 uint8_t queues[], uint8_t priorities[]);
1560
1576int
1577rte_event_dev_service_id_get(uint8_t dev_id, uint32_t *service_id);
1578
1592int
1593rte_event_dev_dump(uint8_t dev_id, FILE *f);
1594
1596#define RTE_EVENT_DEV_XSTATS_NAME_SIZE 64
1597
1602 RTE_EVENT_DEV_XSTATS_DEVICE,
1603 RTE_EVENT_DEV_XSTATS_PORT,
1604 RTE_EVENT_DEV_XSTATS_QUEUE,
1605};
1606
1615};
1616
1649int
1651 enum rte_event_dev_xstats_mode mode,
1652 uint8_t queue_port_id,
1653 struct rte_event_dev_xstats_name *xstats_names,
1654 unsigned int *ids,
1655 unsigned int size);
1656
1683int
1685 enum rte_event_dev_xstats_mode mode,
1686 uint8_t queue_port_id,
1687 const unsigned int ids[],
1688 uint64_t values[], unsigned int n);
1689
1706uint64_t
1707rte_event_dev_xstats_by_name_get(uint8_t dev_id, const char *name,
1708 unsigned int *id);
1709
1730int
1732 enum rte_event_dev_xstats_mode mode,
1733 int16_t queue_port_id,
1734 const uint32_t ids[],
1735 uint32_t nb_ids);
1736
1747int rte_event_dev_selftest(uint8_t dev_id);
1748
1779struct rte_mempool *
1780rte_event_vector_pool_create(const char *name, unsigned int n,
1781 unsigned int cache_size, uint16_t nb_elem,
1782 int socket_id);
1783
1784#include <rte_eventdev_core.h>
1785
1786static __rte_always_inline uint16_t
1787__rte_event_enqueue_burst(uint8_t dev_id, uint8_t port_id,
1788 const struct rte_event ev[], uint16_t nb_events,
1789 const event_enqueue_burst_t fn)
1790{
1791 const struct rte_event_fp_ops *fp_ops;
1792 void *port;
1793
1794 fp_ops = &rte_event_fp_ops[dev_id];
1795 port = fp_ops->data[port_id];
1796#ifdef RTE_LIBRTE_EVENTDEV_DEBUG
1797 if (dev_id >= RTE_EVENT_MAX_DEVS ||
1798 port_id >= RTE_EVENT_MAX_PORTS_PER_DEV) {
1799 rte_errno = EINVAL;
1800 return 0;
1801 }
1802
1803 if (port == NULL) {
1804 rte_errno = EINVAL;
1805 return 0;
1806 }
1807#endif
1808 rte_eventdev_trace_enq_burst(dev_id, port_id, ev, nb_events, fn);
1809 /*
1810 * Allow zero cost non burst mode routine invocation if application
1811 * requests nb_events as const one
1812 */
1813 if (nb_events == 1)
1814 return (fp_ops->enqueue)(port, ev);
1815 else
1816 return fn(port, ev, nb_events);
1817}
1818
1862static inline uint16_t
1863rte_event_enqueue_burst(uint8_t dev_id, uint8_t port_id,
1864 const struct rte_event ev[], uint16_t nb_events)
1865{
1866 const struct rte_event_fp_ops *fp_ops;
1867
1868 fp_ops = &rte_event_fp_ops[dev_id];
1869 return __rte_event_enqueue_burst(dev_id, port_id, ev, nb_events,
1870 fp_ops->enqueue_burst);
1871}
1872
1914static inline uint16_t
1915rte_event_enqueue_new_burst(uint8_t dev_id, uint8_t port_id,
1916 const struct rte_event ev[], uint16_t nb_events)
1917{
1918 const struct rte_event_fp_ops *fp_ops;
1919
1920 fp_ops = &rte_event_fp_ops[dev_id];
1921 return __rte_event_enqueue_burst(dev_id, port_id, ev, nb_events,
1922 fp_ops->enqueue_new_burst);
1923}
1924
1966static inline uint16_t
1967rte_event_enqueue_forward_burst(uint8_t dev_id, uint8_t port_id,
1968 const struct rte_event ev[], uint16_t nb_events)
1969{
1970 const struct rte_event_fp_ops *fp_ops;
1971
1972 fp_ops = &rte_event_fp_ops[dev_id];
1973 return __rte_event_enqueue_burst(dev_id, port_id, ev, nb_events,
1974 fp_ops->enqueue_forward_burst);
1975}
1976
2043static inline uint16_t
2044rte_event_dequeue_burst(uint8_t dev_id, uint8_t port_id, struct rte_event ev[],
2045 uint16_t nb_events, uint64_t timeout_ticks)
2046{
2047 const struct rte_event_fp_ops *fp_ops;
2048 void *port;
2049
2050 fp_ops = &rte_event_fp_ops[dev_id];
2051 port = fp_ops->data[port_id];
2052#ifdef RTE_LIBRTE_EVENTDEV_DEBUG
2053 if (dev_id >= RTE_EVENT_MAX_DEVS ||
2054 port_id >= RTE_EVENT_MAX_PORTS_PER_DEV) {
2055 rte_errno = EINVAL;
2056 return 0;
2057 }
2058
2059 if (port == NULL) {
2060 rte_errno = EINVAL;
2061 return 0;
2062 }
2063#endif
2064 rte_eventdev_trace_deq_burst(dev_id, port_id, ev, nb_events);
2065 /*
2066 * Allow zero cost non burst mode routine invocation if application
2067 * requests nb_events as const one
2068 */
2069 if (nb_events == 1)
2070 return (fp_ops->dequeue)(port, ev, timeout_ticks);
2071 else
2072 return (fp_ops->dequeue_burst)(port, ev, nb_events,
2073 timeout_ticks);
2074}
2075
2076#define RTE_EVENT_DEV_MAINT_OP_FLUSH (1 << 0)
2118__rte_experimental
2119static inline int
2120rte_event_maintain(uint8_t dev_id, uint8_t port_id, int op)
2121{
2122 const struct rte_event_fp_ops *fp_ops;
2123 void *port;
2124
2125 fp_ops = &rte_event_fp_ops[dev_id];
2126 port = fp_ops->data[port_id];
2127#ifdef RTE_LIBRTE_EVENTDEV_DEBUG
2128 if (dev_id >= RTE_EVENT_MAX_DEVS ||
2129 port_id >= RTE_EVENT_MAX_PORTS_PER_DEV)
2130 return -EINVAL;
2131
2132 if (port == NULL)
2133 return -EINVAL;
2134
2135 if (op & (~RTE_EVENT_DEV_MAINT_OP_FLUSH))
2136 return -EINVAL;
2137#endif
2138 rte_eventdev_trace_maintain(dev_id, port_id, op);
2139
2140 if (fp_ops->maintain != NULL)
2141 fp_ops->maintain(port, op);
2142
2143 return 0;
2144}
2145
2146#ifdef __cplusplus
2147}
2148#endif
2149
2150#endif /* _RTE_EVENTDEV_H_ */
#define RTE_STD_C11
Definition: rte_common.h:42
#define __rte_always_inline
Definition: rte_common.h:228
#define rte_errno
Definition: rte_errno.h:29
int rte_event_port_links_get(uint8_t dev_id, uint8_t port_id, uint8_t queues[], uint8_t priorities[])
int rte_event_port_unlinks_in_progress(uint8_t dev_id, uint8_t port_id)
int rte_event_dequeue_timeout_ticks(uint8_t dev_id, uint64_t ns, uint64_t *timeout_ticks)
int rte_event_port_link(uint8_t dev_id, uint8_t port_id, const uint8_t queues[], const uint8_t priorities[], uint16_t nb_links)
static uint16_t rte_event_enqueue_forward_burst(uint8_t dev_id, uint8_t port_id, const struct rte_event ev[], uint16_t nb_events)
static uint16_t rte_event_dequeue_burst(uint8_t dev_id, uint8_t port_id, struct rte_event ev[], uint16_t nb_events, uint64_t timeout_ticks)
int rte_event_dev_service_id_get(uint8_t dev_id, uint32_t *service_id)
int rte_event_dev_xstats_names_get(uint8_t dev_id, enum rte_event_dev_xstats_mode mode, uint8_t queue_port_id, struct rte_event_dev_xstats_name *xstats_names, unsigned int *ids, unsigned int size)
rte_event_dev_xstats_mode
int rte_event_eth_rx_adapter_caps_get(uint8_t dev_id, uint16_t eth_port_id, uint32_t *caps)
int rte_event_queue_setup(uint8_t dev_id, uint8_t queue_id, const struct rte_event_queue_conf *queue_conf)
int rte_event_queue_default_conf_get(uint8_t dev_id, uint8_t queue_id, struct rte_event_queue_conf *queue_conf)
int rte_event_dev_selftest(uint8_t dev_id)
int rte_event_dev_info_get(uint8_t dev_id, struct rte_event_dev_info *dev_info)
void rte_event_dev_stop(uint8_t dev_id)
uint8_t rte_event_dev_count(void)
int rte_event_dev_xstats_reset(uint8_t dev_id, enum rte_event_dev_xstats_mode mode, int16_t queue_port_id, const uint32_t ids[], uint32_t nb_ids)
struct rte_mempool * rte_event_vector_pool_create(const char *name, unsigned int n, unsigned int cache_size, uint16_t nb_elem, int socket_id)
int rte_event_crypto_adapter_caps_get(uint8_t dev_id, uint8_t cdev_id, uint32_t *caps)
int rte_event_dev_dump(uint8_t dev_id, FILE *f)
int rte_event_timer_adapter_caps_get(uint8_t dev_id, uint32_t *caps)
int rte_event_dev_attr_get(uint8_t dev_id, uint32_t attr_id, uint32_t *attr_value)
int rte_event_dev_get_dev_id(const char *name)
uint64_t rte_event_dev_xstats_by_name_get(uint8_t dev_id, const char *name, unsigned int *id)
#define RTE_EVENT_DEV_MAINT_OP_FLUSH
static uint16_t rte_event_enqueue_new_burst(uint8_t dev_id, uint8_t port_id, const struct rte_event ev[], uint16_t nb_events)
int rte_event_queue_attr_get(uint8_t dev_id, uint8_t queue_id, uint32_t attr_id, uint32_t *attr_value)
int rte_event_port_attr_get(uint8_t dev_id, uint8_t port_id, uint32_t attr_id, uint32_t *attr_value)
int rte_event_dev_start(uint8_t dev_id)
int rte_event_dev_stop_flush_callback_register(uint8_t dev_id, eventdev_stop_flush_t callback, void *userdata)
int rte_event_port_default_conf_get(uint8_t dev_id, uint8_t port_id, struct rte_event_port_conf *port_conf)
int rte_event_port_setup(uint8_t dev_id, uint8_t port_id, const struct rte_event_port_conf *port_conf)
void(* eventdev_stop_flush_t)(uint8_t dev_id, struct rte_event event, void *arg)
Definition: rte_eventdev.h:912
int rte_event_eth_tx_adapter_caps_get(uint8_t dev_id, uint16_t eth_port_id, uint32_t *caps)
int rte_event_dev_xstats_get(uint8_t dev_id, enum rte_event_dev_xstats_mode mode, uint8_t queue_port_id, const unsigned int ids[], uint64_t values[], unsigned int n)
int rte_event_port_unlink(uint8_t dev_id, uint8_t port_id, uint8_t queues[], uint16_t nb_unlinks)
#define RTE_EVENT_DEV_XSTATS_NAME_SIZE
int rte_event_dev_socket_id(uint8_t dev_id)
int rte_event_dev_configure(uint8_t dev_id, const struct rte_event_dev_config *dev_conf)
static __rte_experimental int rte_event_maintain(uint8_t dev_id, uint8_t port_id, int op)
int rte_event_dev_close(uint8_t dev_id)
static uint16_t rte_event_enqueue_burst(uint8_t dev_id, uint8_t port_id, const struct rte_event ev[], uint16_t nb_events)
uint32_t dequeue_timeout_ns
Definition: rte_eventdev.h:476
uint8_t nb_single_link_event_port_queues
Definition: rte_eventdev.h:525
uint32_t nb_event_port_enqueue_depth
Definition: rte_eventdev.h:515
uint32_t nb_event_queue_flows
Definition: rte_eventdev.h:502
uint32_t nb_event_port_dequeue_depth
Definition: rte_eventdev.h:507
uint8_t max_event_port_links
Definition: rte_eventdev.h:401
uint32_t max_event_port_enqueue_depth
Definition: rte_eventdev.h:396
uint32_t dequeue_timeout_ns
Definition: rte_eventdev.h:375
uint32_t min_dequeue_timeout_ns
Definition: rte_eventdev.h:371
uint8_t max_event_queues
Definition: rte_eventdev.h:377
uint32_t max_event_queue_flows
Definition: rte_eventdev.h:379
uint8_t max_event_port_dequeue_depth
Definition: rte_eventdev.h:391
uint8_t max_event_queue_priority_levels
Definition: rte_eventdev.h:381
uint8_t max_event_priority_levels
Definition: rte_eventdev.h:385
uint32_t event_dev_cap
Definition: rte_eventdev.h:410
const char * driver_name
Definition: rte_eventdev.h:369
uint32_t max_dequeue_timeout_ns
Definition: rte_eventdev.h:373
struct rte_device * dev
Definition: rte_eventdev.h:370
uint8_t max_single_link_event_port_queue_pairs
Definition: rte_eventdev.h:412
int32_t new_event_threshold
Definition: rte_eventdev.h:757
uint32_t nb_atomic_order_sequences
Definition: rte_eventdev.h:583
uint16_t attr_valid
Definition: rte_eventdev.h:968
uint64_t impl_opaque
Definition: rte_eventdev.h:988
uint8_t priority
uint32_t flow_id
uint8_t rsvd
uint8_t op
uint32_t event_type
struct rte_mbuf * mbuf
uint8_t queue_id
uint8_t sched_type
uint64_t u64
struct rte_event_vector * vec
uint8_t impl_opaque
uint32_t sub_event_type
void * event_ptr
rte_iova_t buf_iova __rte_aligned(sizeof(rte_iova_t))
char name[RTE_MEMPOOL_NAMESIZE]
Definition: rte_mempool.h:213
uint32_t cache_size
Definition: rte_mempool.h:224